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US3582542A Expired / Lapsed US ⏱️ 0.0 years remaining

Multiplexed, sequential dot interlaced television system

Assignee: TDK Micronas GmbH
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Filing: 1970-04-15
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Granted: 1971-06-01
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Expires: 1990-04-15
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Abstract

Abstract A multiplexed sequential dot interlaced television system having a plurality of television cameras at the transmitting station with a common source of line and frame synchronizing signals supplying all of the cameras. A clock pulse generator is provided for generating a train of clock pulses having a frequency fc fen2 WHERE FE IS THE SAMPLING SIGNAL FREQUENCY FE FV (LD)/(n1n2) WHERE FV IS THE FREQUENCY OF THE FRAME SYNCHRONIZING SIGNALS, L is the number of lines in one frame, D is the number of clock pulses occurring during one line, n1 is the vertical interlace ratio (if any), and n2 is a predetermined dot interlace ratio, it being required that the quotient LD/n1n2 be irreducible and that there are no more cameras than the dot interlace ratio. A shift register is provided coupled to the clock pulse generator and having n2 output channels, the shift register thus sequentially switching successive ones of the clock pulses to successive ones of its output channels so that a train of sampling pulses having a frequency fe is provided in each output channel of the shift register, these trains of sampling pulses being respective phasedisplaced by the period of the clock pulse frequency fc. A plurality of sampling gates is provided respectively coupling the output circuits of the cameras to a video signal transmission facility, each of the sampling gates having a sampling signal output circuit which is coupled to a different output channel of the shift register. Each of the sampling gates thus passes a train of sampled video signals from the respective camera to the transmission facility, the trains of sampled video signals being multiplexed in the transmission facility by reason of the phasedisplacement of the trains of sampling signals. The line and frame synchronizing signals are also applied to the transmission facility. At the receiving station, a plurality of video monitors is provided equal in number to the cameras and each having line and frame sweep means and a video signal input circuit. A synchronizing signal detector circuit is coupled to the transmission facility for separating the line and frame synchronizing signals which are applied to all of the video monitors. Another clock pulse generator is provided which generates a train of clock pulses having a frequency fc, this receiving station clock pulse generator being coupled to the synchronizing signal detector and synchronized with the clock pulse generator at the transmitting station by the separated line synchronizing signals. Another shift register is provided coupled to the receiving station clock pulse generator and also having n2 channels. Another plurality of sampling gates is provided equal in number to the video monitors and respectively coupling the monitors to the transmission facility. Each of the receiving stations sampling gates has a sampling signal input circuit which is couplEd to a different one of the receiving station output channels.

Inventors

  • 👤 Edward S Smierciak

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 13:20
CPC Classifications
H; H04; H04N; H04N7/00; H04N7/08; H04N7/0806

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 240 words
A time division multiplex transmission system for a plurality of sequential dot interlaced raster-type signals comprising: a plurality of channels each channel including camera means and line and frame sweep means and video signal output circuit means for respectively providing sequential dot interlaced raster-type video signals; a common source of line synchronizing signals and a common source of frame synchronizing signals respectively coupled to said line and frame sweep means of said plurality of camera means for respectively synchronizing said video signals; video signal transmission means; means responsive to said common source of line-synchronizing signal for generating a plurality of trains of recurrent sampling signals equal in number to said camera means and each having a frequency fe fv(LD/n1n2) where fv is the frequency of said frame-synchronizing signals, L is the number of lines in one frame, D is a predetermined number of picture elements in one line, n1 is the vertical interlace ratio, and n2 is a predetermined dot interlace ratio, the quotient LD/n1n2 being irreducible, and there being no more camera means than n2; means for coupling each of said camera means output circuits to said transmission means in response to a different one of said trains of sampling signals to apply the entire sampled dot video signals from each respective camera means to said transmission means; and said generating means including means for respectively phase-displacing said trains of sampling signals whereby said sampled video signals are multiplexed.
Claim 2
Dependent Claim 240 words
A time division multiplex transmission system for a plurality of sequential dot interlaced raster-type signals comprising: a plurality of channels each channel including camera means and line and frame sweep means and video signal output circuit means for respectively providing sequential dot interlaced raster-type video signals; a common source of line synchronizing signals and a common source of frame synchronizing signals respectively coupled to said line and frame sweep means of said plurality of camera means for respectively synchronizing said video signals; video signal transmission means; means responsive to said common source of line-synchronizing signal for generating a plurality of trains of recurrent sampling signals equal in number to said camera means and each having a frequency fe fv(LD/n1n2) where fv is the frequency of said frame-synchronizing signals, L is the number of lines in one frame, D is a predetermined number of picture elements in one line, n1 is the vertical interlace ratio, and n2 is a predetermined dot interlace ratio, the quotient LD/n1n2 being irreducible, and there being no more camera means than n2; means for coupling each of said camera means output circuits to said transmission means in response to a different one of said trains of sampling signals to apply the entire sampled dot video signals from each respective camera means to said transmission means; and said generating means including means for respectively phase-displacing said trains of sampling signals whereby said sampled video signals are multiplexed.
Claim 3
Dependent Claim 62 words
The system of claim 1 wherein said coupling means includes a plurality of selectively actuable sampling gate means equal in number to said camera means and respectively coupling said output circuits to said transmission means, each of said gate means having a gating signal input circuit and means for respectively applying said trains of sampling signals to said gate means input circuits.
Claim 4
Dependent Claim 25 words
The system of claim 1 wherein said phase-displacing means phase-displaces said trains of sampling signals by a multiple of the period of a frequency fen2.
Claim 5
Dependent Claim 42 words
The system of claim 3 further comprising a source of recurrent timing signals having a frequency fc fen2, said generating means being coupled to said source and actuated thereby, fc being such that there arE D timing signals generated during one line.
Claim 6
Dependent Claim 87 words
The system of claim 4 wherein said generating means includes means for sequentially switching successive ones of said timing signals to n2 channels, said coupling means including a plurality of selectively actuable sampling gate means equal in number to said camera means and respectively coupling said output circuits to said transmission means, each of said gate means having a gating signal input circuit, each of said input circuits being coupled to a different one of said channels and actuated by the respective train of sampling signals therein.
Claim 7
Dependent Claim 135 words
The system of claim 1 further comprising a plurality of video monitor means equal in number to said camera means and each including line and frame sweep means and video signal input circuit means; a second common source of line and frame sweep means coupled to said line and frame sweep means of all of said monitor means; means for synchronizing said second source with said first-named sources of synchronizing signals; second means for generating a plurality of second trains of recurrent sampling signals equal in number to said camera means and having the same frequency and phase displacement on said first-named plurality of trains; and second means for coupling each of said monitor means input circuit means to said transmission means in response to a different one of said second trains of sampling signals.
Claim 8
Dependent Claim 66 words
The system of claim 6 wherein said second coupling means includes a plurality of selectively actuable sampling gate means equal in number to said monitor means and respectively coupling said input circuit means to said transmission means, each of said gate means having a gating signal input circuit, and means for respectively applying said second trains of sampling signals to said second gate means input circuits.
Claim 9
Dependent Claim 100 words
The system of claim 6 further comprising a first source of recurrent timing signals having a frequency fc fen2, said first-named generating means being coupled to said first timing signal source and actuated thereby and including means for phase-displacing said first-named trains of sampling signals by a multiple of the period of fc; a second source of recurrent timing signals having a frequency fc, said second generating means being coupled to said second timing signal source and actuated thereby and including means for phase-displacing said second trains, fc being such that there are D timing signals generated during one line.
Claim 10
Dependent Claim 30 words
The system of claim 8 wherein said second timing signal source is coupled to said second synchronizing signal source and thereby maintained in synchronism with said first timing signal source.
Claim 11
Dependent Claim 90 words
The system of claim 8 wherein said second generating means includes means for sequentially switching successive ones of said second timing signals to n2 channels, said second coupling means including a plurality of selectively actuable sampling gate means equal in number to said monitor means and respectively coupling said input circuit means to said transmission means, each of said gate means having a gating signal input circuit, each of said gate means input circuits being coupled to a different one of said channels and actuated by the sampling signals therein.
Claim 12
Dependent Claim 58 words
The system of claim 4 further comprising means for actuating said timing signal source thereby to initiate a train of timing signals in response to each said line-synchronizing signal, and means for terminating each said train in response to D timing signals, fc being such that each interval between successive line-synchronizing signals is larger than D timing signals.
Claim 13
Dependent Claim 109 words
The system of claim 8 further comprising means coupling said first-named line-synchronizing signal source to said first timing signal source for initiating a train of said first-named timing signals in response to each said first-named line-sYnchronizing signal; means for terminating each said train of first-named timing signals in response to D timing signals, fc being such that each interval between successive line synchronizing signals is longer than D timing signals; means coupling said second synchronizing signal source to said second timing signal source for initiating a train of said second-named line-synchronizing signals; and means for terminating each said train of second-named timing signals in response to D timing signals.
Claim 14
Dependent Claim 206 words
The system of claim 11 further comprising a plurality of video monitor means equal in number to said camera means and each including line and frame sweep means and video signal input circuit means; a second common source of line and frame sweep synchronizing signals coupled to said line and frame sweep means of all of said monitor means; means for synchronizing said second source with said first-named sources of synchronizing signals; second means for generating a plurality of second trains of recurrent sampling signals equal in number to said monitor means and each having the same frequency as said first-named trains; a plurality of delay means equal in number to said monitor means respectively coupling said second synchronizing signal source to said second sampling signal-generating means for respectively actuating the same to initiate said second trains of sampling signals with the same phase displacement as said first-named trains of sampling signals in response to each said second line-synchronizing signal; means for terminating each said second train of sampling signals in response to each said second line-synchronizing signal; and means for coupling each of said monitor means input circuits to said transmission means in response to a different one of said second plurality of sampling signals.
Claim 15
Dependent Claim 14 words
The system of claim 13 wherein each of said delay means is selectively adjustable.

References Cited (Backward Citations)

US2527867A Cited
US2677721A Cited
US2870247A Cited
US3042751A Cited
US3078378A Cited
US3136847A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-05-31 1974-11-30 1975-06-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-05-31 1978-11-30 1979-06-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-05-31 1982-11-30 1983-06-01 $7700.00 Window Closed / Lapsed

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