US3584232A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Precision logarithmic converter
Assignee: AT&T Inc
•
Filing: 1969-01-21
•
Granted: 1971-06-08
•
Expires: 1989-01-21
Abstract
Abstract Precision logarithmic conversion is achieved by utilizing a serial connection of Schottky barrier diodes in conjunction with an operational amplifier. Deviation from the desired logarithmic characteristic because of diode limitations, namely, reverse-bias saturation current, forward-bias resistance, temperature dependence and the like, is minimized by selectively supplying compensating signals into the input and output circuitry of the amplifier.
Inventors
- 👤 Robert L Wallace Jr
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 09:46
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/24
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
216 words
A logarithmic converter which comprises: first amplifier means having an input and an output; first nonlinear semiconductor means in circuit with said first amplifier means for establishing a logarithmic transfer characteristic; means for supplying a first signal as a first input to said first amplifier means; means for developing a second signal having an amplitude proportional to the amplitude of said first signal; second nonlinear semiconductor means; means for reverse biasing said second nonlinear semiconductor means to generate a third signal; means for selectively supplying said third signal as a second input to said first amplifier means; second amplifier means; third nonlinear semiconductor means in circuit with said second amplifier means for establishing a logarithmic transfer characteristic; means for supplying a fourth signal having a predetermined amplitude as a first input to said second amplifier means; means for selectively supplying said third signal as a second input to said second amplifier means; means for generating a fifth signal having an amplitude proportional to the amplitude of said fourth signal; first means for selectively algebraically combining said fifth signal with a signal developed at the output of said second amplifier means; and second means for selectively algebraically combining said first combined signal, a signal developed at the output of said first amplifier means and said second signal.
Claim 2
Dependent Claim
216 words
A logarithmic converter which comprises: first amplifier means having an input and an output; first nonlinear semiconductor means in circuit with said first amplifier means for establishing a logarithmic transfer characteristic; means for supplying a first signal as a first input to said first amplifier means; means for developing a second signal having an amplitude proportional to the amplitude of said first signal; second nonlinear semiconductor means; means for reverse biasing said second nonlinear semiconductor means to generate a third signal; means for selectively supplying said third signal as a second input to said first amplifier means; second amplifier means; third nonlinear semiconductor means in circuit with said second amplifier means for establishing a logarithmic transfer characteristic; means for supplying a fourth signal having a predetermined amplitude as a first input to said second amplifier means; means for selectively supplying said third signal as a second input to said second amplifier means; means for generating a fifth signal having an amplitude proportional to the amplitude of said fourth signal; first means for selectively algebraically combining said fifth signal with a signal developed at the output of said second amplifier means; and second means for selectively algebraically combining said first combined signal, a signal developed at the output of said first amplifier means and said second signal.
Claim 3
Dependent Claim
25 words
A logarithmic converter as defined in claim 1 wherein each of said first, second and third nonlinear semiconductor means includes at least one semiconductor diode.
Claim 4
Dependent Claim
48 words
A logarithmic converter as defined in claim 1 further including third amplifier means in circuit with said second nonlinear semiconductor means and wherein said means for supplying said third signal to the input of said first amplifier means includes means for adjusting the amplitude of said third signal.
Claim 5
Dependent Claim
48 words
A circuit as defined in claim 1 wherein said first nonlinear semiconductor means includes a plurality of diodes connected in series, said second nonlinear semiconductor means includes a plurality of diodes connected in parallel, and said Third nonlinear semiconductor means includes a plurality of diodes connected in series.
Claim 6
Dependent Claim
43 words
Apparatus as defined in claim 1 further including amplifier means having a gain characteristic which varies in a predetermined inverse relationship with changes in temperature, said means being responsive to compensate signals developed by said summing amplifier for variations because of temperature change.
Claim 7
Dependent Claim
19 words
Apparatus as defined in claim 1 wherein each of said first and second combining means includes a summing amplifier.
Claim 8
Dependent Claim
29 words
Apparatus as defined in claim 6 wherein the summing amplifier of said second combining means has a gain characteristic which varies in a predetermined inverse relationship with temperature variation.
Claim 9
Dependent Claim
263 words
A logarithmic conversion circuit which comprises, in combination: a first amplifier having an input, an output and a feedback circuit; a first plurality of diodes connected in series in the feedback circuit of said first amplifier; means for supplying a signal as a first input to said first amplifier; a second amplifier having an input, an output and a feedback circuit; a second plurality of diodes connected in parallel in the input of said second amplifier; means for reverse biasing said second plurality of diodes; means in circuit relationship with said second amplifier for adjusting the amplitude of signals developed at the output of said second amplifier; means for applying said adjusted signals developed by said second amplifier as a second input to said first amplifier; a third amplifier having an input, an output and a feedback circuit; a third plurality of diodes serially connected in the feedback circuit of said third amplifier; means for applying a signal having a fixed magnitude as a first input to said third amplifier; means for applying signals developed by said second amplifier as a second input to said third amplifier; means in circuit relationship with said third amplifier for adjusting the amplitude of a signal developed at the output of said third amplifier; means for developing a signal proportional to said signal supplied as said first input to said first amplifier; and means for selectively algebraically summing said signal proportional to said first input signal, said signal developed at the output of said first amplifier, and said signal developed at the output of said third amplifier.
Claim 10
Dependent Claim
263 words
A logarithmic conversion circuit which comprises, in combination: a first amplifier having an input, an output and a feedback circuit; a first plurality of diodes connected in series in the feedback circuit of said first amplifier; means for supplying a signal as a first input to said first amplifier; a second amplifier having an input, an output and a feedback circuit; a second plurality of diodes connected in parallel in the input of said second amplifier; means for reverse biasing said second plurality of diodes; means in circuit relationship with said second amplifier for adjusting the amplitude of signals developed at the output of said second amplifier; means for applying said adjusted signals developed by said second amplifier as a second input to said first amplifier; a third amplifier having an input, an output and a feedback circuit; a third plurality of diodes serially connected in the feedback circuit of said third amplifier; means for applying a signal having a fixed magnitude as a first input to said third amplifier; means for applying signals developed by said second amplifier as a second input to said third amplifier; means in circuit relationship with said third amplifier for adjusting the amplitude of a signal developed at the output of said third amplifier; means for developing a signal proportional to said signal supplied as said first input to said first amplifier; and means for selectively algebraically summing said signal proportional to said first input signal, said signal developed at the output of said first amplifier, and said signal developed at the output of said third amplifier.
Claim 11
Dependent Claim
23 words
A circuit as defined in claim 8 wherein said summing means has a gain characteristic which varies in an inverse relationship with temperature.
References Cited (Backward Citations)
US3479593A
Cited
US3417263A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-06-07 | 1974-12-07 | 1975-06-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-06-07 | 1978-12-07 | 1979-06-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-06-07 | 1982-12-07 | 1983-06-08 | $7700.00 | Window Closed / Lapsed |