US3595714A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing a semiconductor device comprising a field-effect transistor
Assignee: US Philips Corp
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Filing: 1968-07-01
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Granted: 1971-07-27
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Expires: 1988-07-01
Abstract
Abstract A METHOD OF MAKIN A JUNCTION FIELD EFFECT TRANSISTOR, BY STEPS COMPATIBLE WITH THE PLANAR TECHNOLOGY IS DESCRIBED. TWO EPITAXIAL ALYERS OF THE SAME TYPE ARE DEPOSITED ON A SUBSTRATE OF THE OPPOSITE TYPE, WITH A BURIED LAYER OF THE OPPOSITE TYPE PROVIDED BETWEEN THE EPITAXIAL LAYERS. THE BURIED LAYER IS MAINTAINED SPACED FROM THE SUBSTRATE, TO DEFINE AN ISOLATION ZONE FOR THE TRANSITOR, AND SPACED FROM THE SURFACE, TO DEFINE A CHANNEL REGION OF THE ORIGINAL EPITAXIAL MATERIAL UNDERNEATH A DIFFUSED GATE ELECTRODE.
Inventors
- 👤 Jacques Thire
- 👤 Michel De Brebisson
- 👤 Jean-Claude Frouin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 18:37
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/34; H03F3/343; H03F3/347; H10; H10D; H10D30/00; H10D30/80; H10D30/83; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0158; H10D84/40; H10D84/401; H10D84/403; Y; Y10; Y10S; Y10S148/00; Y10S148/037; Y10S148/053; Y10S148/085; Y10S148/145; Y10S148/151
Claims Analysis
Total Claims: 0
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References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-07-26 | 1975-01-25 | 1975-07-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-07-26 | 1979-01-25 | 1979-07-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-07-26 | 1983-01-25 | 1983-07-27 | $7700.00 | Window Closed / Lapsed |