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US3597696A Expired / Lapsed US ⏱️ 0.0 years remaining

Stable high-gain solid state dc amplifier

Assignee: Vapor Corp
•
Filing: 1969-09-11
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Granted: 1971-08-03
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Expires: 1989-09-11
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Abstract

Abstract A stable high-gain solid-state DC amplifier circuit comprising a low-pass filter connecting a DC supply to an input chopper (either shunt or series connected) that is AC coupled to a highgain noninverting AC amplifier; the amplifier is in turn AC coupled to an output chopper (again, either series or shunt connected) connected to a storage capacitor, with a negative feedback circuit from the storage capacitor back to the low-pass filter in the input of the input chopper. The two choppers are driven in effective phase opposition, relative to each other, so that the feedback loop is not completely closed at any instant. For improved gain, the combination of a series chopper and a shunt chopper may be used at either end, or at both ends, of the amplifier circuit.

Inventors

  • 👤 Karavattuveetil Geor Rabindran

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 18:22
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/38; H03F3/387; H03F3/393

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 219 words
A stable, high-gain solid state DC amplifier circuit having an input terminal connectable to a DC signal source, and having an output terminal, comprising: input chopper means, connected to said input terminal, for developing a pulsating intermediate signal varying in amplitude with changes in amplitude of a DC signal applied to said input terminal; a high-gain noninverting AC amplifier having an input and an output; first AC coupling means, coupled to said input chopper means, for applying said intermediate signal to the input of said AC amplifier, said AC amplifier developing an amplified intermediate signal at its output; output chopper means, connected to said output terminal second AC coupling means, coupled to the output of said AC amplifier, for applying said amplified intermediate signal to said output chopper means; negative feedback circuit connecting said output terminal back to the input of said input chopper means; and chopper drive means, coupled to said input chopper means and said output chopper means, for actuating both of said chopper means at a given frequency but in effective phase opposition relative to each other so that the feedback loop is not completely closed at any given instant; at least one of said chopper means comprising both a seriesconnected chopper and a shunt-connected chopper, both connected to the same terminal of the amplifier circuit.
Claim 2
Dependent Claim 219 words
A stable, high-gain solid state DC amplifier circuit having an input terminal connectable to a DC signal source, and having an output terminal, comprising: input chopper means, connected to said input terminal, for developing a pulsating intermediate signal varying in amplitude with changes in amplitude of a DC signal applied to said input terminal; a high-gain noninverting AC amplifier having an input and an output; first AC coupling means, coupled to said input chopper means, for applying said intermediate signal to the input of said AC amplifier, said AC amplifier developing an amplified intermediate signal at its output; output chopper means, connected to said output terminal second AC coupling means, coupled to the output of said AC amplifier, for applying said amplified intermediate signal to said output chopper means; negative feedback circuit connecting said output terminal back to the input of said input chopper means; and chopper drive means, coupled to said input chopper means and said output chopper means, for actuating both of said chopper means at a given frequency but in effective phase opposition relative to each other so that the feedback loop is not completely closed at any given instant; at least one of said chopper means comprising both a seriesconnected chopper and a shunt-connected chopper, both connected to the same terminal of the amplifier circuit.
Claim 3
Dependent Claim 33 words
A stable, high-gain solid state DC amplifier circuit according to claim 1 in which the input to said input chopper means comprises a low-pass filter having a cutoff frequency below said given frequency.
Claim 4
Dependent Claim 47 words
A stable, high-gain solid state D.C. amplifier circuit according to claim 2 in which said low-pass filter includes a series resistance R1, said feedback circuit has a series resistance R2, and said amplifier and said chopper means have a total gain A, and in which A >>R2/R1
Claim 5
Dependent Claim 33 words
A stable, high-gain solid state DC amplifier circuit according to claim 2 in which a storage capacitor is connected between said output terminal and a third terminal common to both input and output.
Claim 6
Dependent Claim 56 words
A stable high-gain solid state DC amplifier circuit according to claim 1 in which said series chopper comprises a field effect transistor having two main electrodes, one connected to the associated amplifier circuit terminal and the other connected to the adjacent AC coupling means, and further having a gate electrode connected to said chopper drive means.
Claim 7
Dependent Claim 63 words
A stable high-gain solid state DC amplifier circuit according to claim 1, further comprising a common input-output terminal in which said shunt chopper comprises a field effect transistor having two main electrodes, one connected to the associated amplifier circuit input or output terminal and the other connected to said common terminal, and further having a gate electrode connected to said chopper drive means.
Claim 8
Dependent Claim 48 words
A stable high-gain solid state DC amplifier circuit according to claim 1 in which at least one of said chopper means comprises both a series-connected chopper and a shunt-connected chopper, both connected to the same terminal of the amplifier circuit, and each comprising a single field effect transistor.

References Cited (Backward Citations)

US3454887A Cited
US3510684A Cited
US3518564A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-08-02 1975-02-01 1975-08-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-08-02 1979-02-01 1979-08-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-08-02 1983-02-01 1983-08-03 $7700.00 Window Closed / Lapsed

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