US3629612A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Operation of field-effect transistor circuit having substantial distributed capacitance
Assignee: RCA Corp
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Filing: 1970-09-18
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Granted: 1971-12-21
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Expires: 1990-09-18
Abstract
Abstract The distributed capacitance at circuit nodes between interconnected field-effect transistors of a memory decoder is maintained charged to a fixed value during the major portion of the memory operating time. For example, the distributed capacitance may be connected to the charging source except for brief intervals during which data is being written into or read from the memory. Operation in this way makes it possible to increase the memory operating speed.
Inventors
- 👤 Donald Duane Harbert
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 12:46
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/41; G11C11/413; G11C11/417; G11C11/419; G11C11/412; G11C11/418; H; H03; H03K; H03K3/00; H03K3/02; H03K3/027; H03K3/037; H03K3/353; H03K3/356; H03K3/356104
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
166 words
A circuit for improving the operation of a circuit which includes a plurality of field-effect transistors, each having a conduction path and a control electrode for controlling the conductivity of its path, and in which a plurality of said conduction paths are connected to one another at a circuit node which exhibits substantial distributed capacitance, comprising, in combination; a precharging field-effect transistor having a conduction path connected between said circuit node and a source at a given potential, and having a control electrode for controlling the conductivity of said path; means for normally maintaining said control electrode of said precharging transistor at a value to place the conduction path of said precharging transistor in a relatively low impedance condition, whereby said source places said circuit node at said given potential; and means responsive to a signal manifestation in response to which current flows through a pair of said conduction paths of said plurality of field-effect transistors for placing said precharging transistor in a high impedance condition.
Claim 2
Dependent Claim
166 words
A circuit for improving the operation of a circuit which includes a plurality of field-effect transistors, each having a conduction path and a control electrode for controlling the conductivity of its path, and in which a plurality of said conduction paths are connected to one another at a circuit node which exhibits substantial distributed capacitance, comprising, in combination; a precharging field-effect transistor having a conduction path connected between said circuit node and a source at a given potential, and having a control electrode for controlling the conductivity of said path; means for normally maintaining said control electrode of said precharging transistor at a value to place the conduction path of said precharging transistor in a relatively low impedance condition, whereby said source places said circuit node at said given potential; and means responsive to a signal manifestation in response to which current flows through a pair of said conduction paths of said plurality of field-effect transistors for placing said precharging transistor in a high impedance condition.
Claim 3
Dependent Claim
27 words
A circuit as set forth in claim 1 wherein said precharging transistor is of one conductivity type and said plurality of transistors are of opposite conductivity type.
Claim 4
Dependent Claim
139 words
In combination; first and second switches, the first connected between a circuit point and a voltage source of one value and the second connected between said circuit point and a voltage source of different value, one of said switches being open and the other being closed; third and fourth normally open switches connected in series between a circuit node and said circuit point, said circuit node exhibiting substantial diStributed capacitance to said voltage source of different value; a fifth normally closed switch connected between a source of voltage of a value closer to said one value than to said different value and said circuit node for normally maintaining said node at said value closer to said one value; and means responsive to a control signal for opening said fifth switch when both said third and fourth switches are closed.
Claim 5
Dependent Claim
139 words
In combination; first and second switches, the first connected between a circuit point and a voltage source of one value and the second connected between said circuit point and a voltage source of different value, one of said switches being open and the other being closed; third and fourth normally open switches connected in series between a circuit node and said circuit point, said circuit node exhibiting substantial diStributed capacitance to said voltage source of different value; a fifth normally closed switch connected between a source of voltage of a value closer to said one value than to said different value and said circuit node for normally maintaining said node at said value closer to said one value; and means responsive to a control signal for opening said fifth switch when both said third and fourth switches are closed.
Claim 6
Dependent Claim
14 words
In the combination as set forth in claim 3, said switches comprising field-effect transistors.
Claim 7
Dependent Claim
35 words
In the combination as set forth in claim 3, said second, third and fourth switches comprising field-effect transistors of one conductivity type and said first and fifth switches comprising field-effect transistors of opposite conductivity type.
Claim 8
Dependent Claim
131 words
In combination; a circuit point; means effectively connecting said circuit point to one of two voltage sources, the first such source having one value and the second such source having a second value; first and second normally open switches connected in series between a circuit node and said circuit point, said node exhibiting substantial distributed capacitance relative to said voltage source of second value; a third normally closed switch connected between a source of voltage of a value closer to said one value than to said second value and said node for normally maintaining said distributed capacitance charged; and means for closing said first and second switches; and means responsive to a strobe signal which occurs concurrently with the closing of said first and second switches for opening said third switch.
Claim 9
Dependent Claim
131 words
In combination; a circuit point; means effectively connecting said circuit point to one of two voltage sources, the first such source having one value and the second such source having a second value; first and second normally open switches connected in series between a circuit node and said circuit point, said node exhibiting substantial distributed capacitance relative to said voltage source of second value; a third normally closed switch connected between a source of voltage of a value closer to said one value than to said second value and said node for normally maintaining said distributed capacitance charged; and means for closing said first and second switches; and means responsive to a strobe signal which occurs concurrently with the closing of said first and second switches for opening said third switch.
Claim 10
Dependent Claim
140 words
In combination; first and second normally open switches connected in series between a circuit node and a circuit point which connects to one of (a) ground and (b) a voltage source of value other than ground, said circuit node exhibiting substantial distributed capacitance to ground, whereby when said circuit point is at ground and said switches are first both closed and then both opened, said distributed capacitance, if charged, first discharges and then tends to remain discharged; a third normally closed switch connected between a source of voltage of a value closer to that of said voltage source than to ground and said circuit node for normally maintaining said distributed capacitance charged; means for closing said first and second switches; and means responsive to a signal for opening said third switch when current flows through said first and second switches.
Claim 11
Dependent Claim
140 words
In combination; first and second normally open switches connected in series between a circuit node and a circuit point which connects to one of (a) ground and (b) a voltage source of value other than ground, said circuit node exhibiting substantial distributed capacitance to ground, whereby when said circuit point is at ground and said switches are first both closed and then both opened, said distributed capacitance, if charged, first discharges and then tends to remain discharged; a third normally closed switch connected between a source of voltage of a value closer to that of said voltage source than to ground and said circuit node for normally maintaining said distributed capacitance charged; means for closing said first and second switches; and means responsive to a signal for opening said third switch when current flows through said first and second switches.
Claim 12
Dependent Claim
136 words
In combination; a field-effect transistor memory circuit which at a given terminal thereof is at one voltage level when it stores a 1 and at a second voltage level when it stores a 0; two field-effect transistors, each having a conduction path and a gate electrode for controlling the conductivity of said path; a digit line connected to said terminal via the series connected conduction paths of said two transistors, said digit line exhibiting substantial distributed capacitance; charging means connected to said digit line for normally maintaining said distributed capacitance charged to a level in the approximate range of one of said voltage levels; and means for disconnecting said charging means from said distributed capacitance when said digit line is placed at a voltage level in the approximate range of the other of said voltage levels.
Claim 13
Dependent Claim
136 words
In combination; a field-effect transistor memory circuit which at a given terminal thereof is at one voltage level when it stores a 1 and at a second voltage level when it stores a 0; two field-effect transistors, each having a conduction path and a gate electrode for controlling the conductivity of said path; a digit line connected to said terminal via the series connected conduction paths of said two transistors, said digit line exhibiting substantial distributed capacitance; charging means connected to said digit line for normally maintaining said distributed capacitance charged to a level in the approximate range of one of said voltage levels; and means for disconnecting said charging means from said distributed capacitance when said digit line is placed at a voltage level in the approximate range of the other of said voltage levels.
Claim 14
Dependent Claim
97 words
In a field-effect transistor memory array, in combination; a plurality of field-effect transistor storage cells; a plurality of circuit nodes, each coupled to a plurality of said storage cells and each node exhibiting distributed capacitance; charging means connected to said nodes for normally maintaining said capacitances charged to a reference value; cell selection means for selecting a desired one of said cells comprising means for applying a select signal manifestation to said desired cell; and means responsive to said cell selection means for disconnecting said Charging means from at least a node connected to a selected cell.
Claim 15
Dependent Claim
97 words
In a field-effect transistor memory array, in combination; a plurality of field-effect transistor storage cells; a plurality of circuit nodes, each coupled to a plurality of said storage cells and each node exhibiting distributed capacitance; charging means connected to said nodes for normally maintaining said capacitances charged to a reference value; cell selection means for selecting a desired one of said cells comprising means for applying a select signal manifestation to said desired cell; and means responsive to said cell selection means for disconnecting said Charging means from at least a node connected to a selected cell.
Claim 16
Dependent Claim
76 words
In a field-effect transistor memory array as set forth in claim 9, said memory array comprising an integrated circuit memory on a common substrate, said circuit nodes exhibiting distributed capacitance to said substrate, said charging means including a voltage source, switch means connecting one terminal of said source to said circuit nodes, and a connection from the other terminal of said source to said substrate, and said last-named means comprising means for opening said switch means.
Claim 17
Dependent Claim
173 words
A network in which there are included: at least one circuit having a terminal which is internally connected either to a point at a first voltage or to a point at a second voltage; a node which is external to the circuit and which is capacitively coupled to said point at said first voltage; means including selection switch means selectively operable for closing and opening a connection between said terminal and said node; a circuit connected to said node for one of applying a signal to and receiving a signal from said terminal when said selection switch means has closed said connection between said terminal and said node; means comprising an additional switch for applying to said node, when such additional switch is closed, a given value of voltage; and control means for opening said additional switch when said selection switch means has closed said connection between said terminal and said node and for closing said additional switch when said selection switch means has opened said connection between said terminal and said node.
Claim 18
Dependent Claim
173 words
A network in which there are included: at least one circuit having a terminal which is internally connected either to a point at a first voltage or to a point at a second voltage; a node which is external to the circuit and which is capacitively coupled to said point at said first voltage; means including selection switch means selectively operable for closing and opening a connection between said terminal and said node; a circuit connected to said node for one of applying a signal to and receiving a signal from said terminal when said selection switch means has closed said connection between said terminal and said node; means comprising an additional switch for applying to said node, when such additional switch is closed, a given value of voltage; and control means for opening said additional switch when said selection switch means has closed said connection between said terminal and said node and for closing said additional switch when said selection switch means has opened said connection between said terminal and said node.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-12-20 | 1975-06-21 | 1975-12-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-12-20 | 1979-06-21 | 1979-12-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-12-20 | 1983-06-21 | 1983-12-21 | $7700.00 | Window Closed / Lapsed |