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US3631311A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor circuit arrangement with integrated base leakage resistance

Assignee: Telefunken Electronic GmbH
•
Filing: 1969-03-18
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Granted: 1971-12-28
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Expires: 1989-03-18
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Abstract

Abstract The invention relates to an integrated circuit arrangement comprising a semiconductor body having regions of a first type of conductivity separated by zones of a second type of conductivity. One or more of the regions serves as the collector region of a transistor, the base region thereof being let into the collector region and the emitter region being let into the base region. A separating zone overlaps a portion of the collector region at the semiconductor body surface and extends into the base region whereby a base leakage resistance for the transistor is provided by the bulk resistance between the contact to the separating zone and the base contact.

Inventors

  • 👤 Reiner Engbert

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 07:19
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/611; H10D84/613; H10D84/615; H10D48/00; H10D48/01; H10D48/07; H10D48/071; H10D99/00; H10W; H10W10/00; H10W10/01; H10W10/031; H10W10/30; Y; Y10; Y10S; Y10S148/00; Y10S148/049; Y10S148/085

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 57 words
An integrated semiconductor circuit arrangement as defined in claim 1, wherein the semiconductor body is of the second type of conductivity and comprises, an epitaxial layer of the first type of conductivity at the surface of the semiconductor body, and separation diffusion zones for dividing said layer into individual semiconductor regions of the first type of conductivity.
Claim 2
Dependent Claim 40 words
An integrated semiconductor circuit arrangement as defined in claim 2, wherein said emitter region is an annulus formed by diffusion let into said base region and said ohmic contact is connected to said base region within this emitter diffusion annulus.
Claim 3
Dependent Claim 46 words
An integrated semiconductor circuit arrangement as defined in claim 1, wherein said semiconductor region of said first type of conductivity has a rectangular geometry at the surface of the semiconductor and said base region is rectangular and extends into said separation diffusion zone at three sides.
Claim 4
Dependent Claim 36 words
An integrated semiconductor circuit arrangement as defined in claim 1, wherein said means for providing an ohmic connection to said separation diffusion zones connects said separation diffusion zones to the lowest potential occurring in said circuit.
Claim 5
Dependent Claim 44 words
An integrated semiconductor circuit as defined in claim 1 wherein said base contact is connected to said base region at a location such that the active portion of said base region beneath said emitter region simultaneously forms a part of said base leakage resistance.

References Cited (Backward Citations)

US3416049A Cited
US3418545A Cited
US3395320A Cited
US3448344A Cited
US3423650A Cited
US3519899A Cited
US3510735A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-12-27 1975-06-28 1975-12-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-12-27 1979-06-28 1979-12-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-12-27 1983-06-28 1983-12-28 $7700.00 Window Closed / Lapsed

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