US3638079A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Complementary semiconductor devices in monolithic integrated circuits
Assignee: GTE Sylvania Inc
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Filing: 1970-01-28
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Granted: 1972-01-25
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Expires: 1990-01-28
Abstract
Abstract Monolithic integrated circuit structure having an N-type substrate, a first P-type epitaxial layer, and a second N-type epitaxial layer. N-type isolation barriers extend through the Ptype epitaxial layer and P-type isolation barriers extend through the N-type epitaxial layer to provide sectors including electrically isolated sections of the epitaxial layers. PNP and NPN-bipolar transistors of standard configuration, and N-channel and P-channel junction field-effect transistors may each be fabricated in different sectors.
Inventors
- 👤 Tsiu C Chan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 15:18
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/87; H10D84/60; H10D84/67; H10D84/673; H10W; H10W10/00; H10W10/01; H10W10/031; H10W10/30; Y; Y10; Y10S; Y10S148/00; Y10S148/037; Y10S148/085; Y10S148/151
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
256 words
A monolithic integrated circuit structure comprising a substrate of semiconductor material of one conductivity type; a first layer of semiconductor material of the opposite conductivity type contiguous the substrate; a second layer of semiconductor material of the one conductivity type contiguous the first layer; a first isolation barrier of the one conductivity type extending through the first layer into the substrate and into the second layer to form a first sector including an electrically isolated section of the first layer and the overlying section of the second layer; a second isolation barrier of the opposite conductivity type extending through the second layer to the first layer to form a second sector including an electrically isolated section of the second layer; a first bipolar transistor within the first sector including a collector region of the opposite conductivity type formed at the interface of said first and second layers and having portions extending to the surface of said second layer; a base region of semiconductor material of the second layer of the one conductivity type; and an emitter region formed of semiconductor material of the second layer converted to the opposite conductivity type; a second bipolar transistor, complementary to the first bipolar transistor, within the second sector including a collector region formed of semiconductor material of the second layer of the one conductivity type; a base region formed of semiconductor material of the second layer converted to the opposite conductivity type; and an emitter region formed of semiconductor material of the second layer of the one conductivity type.
Claim 2
Dependent Claim
256 words
A monolithic integrated circuit structure comprising a substrate of semiconductor material of one conductivity type; a first layer of semiconductor material of the opposite conductivity type contiguous the substrate; a second layer of semiconductor material of the one conductivity type contiguous the first layer; a first isolation barrier of the one conductivity type extending through the first layer into the substrate and into the second layer to form a first sector including an electrically isolated section of the first layer and the overlying section of the second layer; a second isolation barrier of the opposite conductivity type extending through the second layer to the first layer to form a second sector including an electrically isolated section of the second layer; a first bipolar transistor within the first sector including a collector region of the opposite conductivity type formed at the interface of said first and second layers and having portions extending to the surface of said second layer; a base region of semiconductor material of the second layer of the one conductivity type; and an emitter region formed of semiconductor material of the second layer converted to the opposite conductivity type; a second bipolar transistor, complementary to the first bipolar transistor, within the second sector including a collector region formed of semiconductor material of the second layer of the one conductivity type; a base region formed of semiconductor material of the second layer converted to the opposite conductivity type; and an emitter region formed of semiconductor material of the second layer of the one conductivity type.
Claim 3
Dependent Claim
148 words
A monolithic integrated circuit structure in accordance with claim 1 wherein said first layer of semiconductor material is contiguous said substrate at a flat, planar interface; said second layer of semiconductor material is contiguous said first layer at a flat, planar interface parallel to the first-mentioned interface; said second layer has a flat, planar surface parallel to the interfaces; the emitter-base and collector-base junctions of the first and second bipolar transistors terminate at said surface; the collector region of the first bipolar transistor is of graded resistivity; the base region of the first bipolar transistor is of uniform resistivity; the emitter region of the first bipolar transistor is of graded resistivity; the collector region of the second bipolar transistor is of uniform resistivity; the base region of the second bipolar transistor is of graded resistivity; and the emitter region of the second bipolar transistor is of graded resistivity.
Claim 4
Dependent Claim
87 words
A monolithic integrated circuit structure in accordance with claim 2 wherein the collector region of the first bipolar transistor includes a zone of the opposite conductivity type of graded resistivity formed by diffusion of conductivity type imparting material into the second layer at the interface between the first and second layers; and a ring of the opposite conductivity type of graded resistivity formed by diffusion of conductivity type imparting material into the second layer at the surface of the second layer; said ring extending to said zone.
Claim 5
Dependent Claim
47 words
A monolithic integrated circuit structure in accordance with claim 3 including a buried zone of the one conductivity type of graded resistivity formed in the second sector by diffusion of conductivity type imparting material into the second layer at the interface between the first and second layers.
Claim 6
Dependent Claim
40 words
A monolithic integrated circuit structure in accordance with claim 4 wherein the one conductivity type is N-type; and the opposite conductivity type is P-type; whereby the first bipolar transistor is a PNP-transistor and the second bipolar transistor is an NPN-transistor.
Claim 7
Dependent Claim
223 words
A monolithic integrated circuit structure in accordance with claim 2 including a third isolation barrier of the one conductivity type extending through the first layer into the substrate and into the second layer to form a third sector including an electrically isolated section of the first layer and the overlying section of the second layer; a first junction field-effect transistor within the third sector including a source region formed of semiconductor material of the second layer of the one conductivity type and having a surface area in said surface; a drain region formed of semiconductor material of the second layer of the one conductivity type and having a surface area in said surface; a first gate region of graded resistivity formed of semiconductor material of the second layer converted to the opposite conductivity type, said first gate region having a surface area in said surface and lying interposed between the source and drain regions; a channel region of uniform resistivity formed of semiconductor material of the second layer of the one conductivity type and extending between the source and drain regions; and a second gate region of graded resistivity formed of semiconductor material of the second layer converted to the opposite conductivity type, said second gate region completely surrounding the source, drain, and channel regions and having a surface area in said surface.
Claim 8
Dependent Claim
259 words
A monolithic integrated circuit structure in accordance with claim 6 including a fourth isolation barrier of the one conductivity type extending through the first layer into the substrate and into the second layer to form a fourth sector including an electrically isolated section of the first layer and the overlying section of the second layer; a second junction field-effect transistor, complementary to the first junction field-effect transistor, within the fourth sector including a source region formed of semiconductor material of the first layer of the opposite conductivity type; a source contact formed of semiconductor material of the second layer converted to the opposite conductivity type, said source contact having a surface area in said surface and extending to the source region; a drain region formed of semiconductor material of the first layer of the opposite conductivity type; a drain contact formed of semiconductor Material of the second layer converted to the opposite conductivity type, said drain contact having a surface area in said surface and extending to the drain region; a gate region of graded resistivity formed of semiconductor material of the first layer converted to the one conductivity type and lying interposed between the source and drain regions; a gate contact formed of semiconductor material of the first layer of the one conductivity type, said gate contact having a surface area in said surface and extending to the gate region; and a channel region of uniform resistivity formed of semiconductor material of the first layer of the opposite conductivity type and extending between the source and drain regions.
Claim 9
Dependent Claim
60 words
A monolithic integrated circuit structure in accordance with claim 7 wherein the one conductivity type is N-type; and the opposite conductivity type is P-type; whereby the first bipolar transistor is a PNP-transistor, the second bipolar transistor is an NPN-transistor, the first junction field-effect transistor is an N-channel field-effect transistor, and the second junction field-effect transistor is a P-channel field-effect transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-01-24 | 1975-07-26 | 1976-01-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-01-24 | 1979-07-26 | 1980-01-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-01-24 | 1983-07-26 | 1984-01-25 | $7700.00 | Window Closed / Lapsed |