US3638189A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Simplified means of skipping selectable segments of a timed program
Assignee: Beckman Coulter Inc
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Filing: 1970-02-02
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Granted: 1972-01-25
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Expires: 1990-02-02
Abstract
Abstract In a programmer for controlling the operation of a plurality of segments in a multiple segment selector system that normally sequences all segments in series, wherein a source of lowfrequency timing pulses is applied to a digital timer which sequentially activates the segments, a simplified means for selectively bypassing any number of said segments comprising a source of high-frequency timing pulses, selector means for generating a separate disable signal for each of the segments to be bypassed, coincidence means responsive to the activation of each of the segments and the selector means for generating a triggering signal upon the simultaneous occurrence of the activation of a segment and a disable signal for such segment, and means responsive to the occurrence of a triggering signal for switching the input of the digital timer from the low-frequency timing pulse source to the high-frequency timing pulse source so that the segment to be bypassed is executed at a very high speed relative to normal operation whereby the timer is rapidly sequenced to the next segment.
Inventors
- 👤 Larry D Gamache
- 👤 Christopher F Miller
- 👤 Kenneth W Barr
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 03:35
CPC Classifications
G; G01; G01N; G01N30/00; G01N30/02; G01N30/88; G05; G05B; G05B19/00; G05B19/02; G05B19/04; G05B19/07; G01N2030/8804; G05B2219/00; G05B2219/20; G05B2219/25; G05B2219/25382
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
132 words
In a programmer for controlling the sequential operation of a plurality of output devices wherein low-frequency timing pulses are applied to a digital timer which sequentially activates said output devices, the improvement comprising means for selectively bypassing any of said output devices, said means comprising: a source of high-frequency timing pulses, the frequency of said source of high-frequency timing pulses exceeding the highest rate of which said output devices can function; logic means operatively coupled to said output devices for generating a triggerinG signal when an output device to be bypassed is activated; and means responsive to said triggering signal for switching the input of said digital timer from said low-frequency timing pulses to said high-frequency timing pulses whereby said digital timer is rapidly sequenced to activate the next selected output device.
Claim 2
Dependent Claim
132 words
In a programmer for controlling the sequential operation of a plurality of output devices wherein low-frequency timing pulses are applied to a digital timer which sequentially activates said output devices, the improvement comprising means for selectively bypassing any of said output devices, said means comprising: a source of high-frequency timing pulses, the frequency of said source of high-frequency timing pulses exceeding the highest rate of which said output devices can function; logic means operatively coupled to said output devices for generating a triggerinG signal when an output device to be bypassed is activated; and means responsive to said triggering signal for switching the input of said digital timer from said low-frequency timing pulses to said high-frequency timing pulses whereby said digital timer is rapidly sequenced to activate the next selected output device.
Claim 3
Dependent Claim
68 words
In a programmer according to claim 1, the improvement wherein said logic means comprises: selector means for generating a separate disable signal for each of said output devices to be bypassed; and coincidence means operatively coupled to said output devices and said selector means for generating said triggering signal upon the simultaneous occurrence of the activation of an output device and a disable signal for such output device.
Claim 4
Dependent Claim
120 words
In a programmer according to claim 2, wherein said output devices go true when activated, and wherein said disable signal is a false signal, the improvement wherein said coincidence means comprises: a plurality of two-input AND gates, one for each output device, each of said AND gates receiving one input from a corresponding output device and one input from said selector means; first and second OR gates, said first OR gate receiving the outputs of said output devices, said second OR gate receiving the outputs of said AND gates; and means responsive to the outputs of said OR gates for generating said triggering signal when the outputs of said first and second OR gates are simultaneously true and false, respectively.
Claim 5
Dependent Claim
87 words
In a programmer according to claim 3, the improvement wherein said means responsive to the outputs of said OR gates comprises: first and second two-input AND gates and an inverter, said first AND gate receiving the outputs of said OR gates, said second AND gate receiving the output of said first OR gate and the output of said second OR gate via said inverter, said second AND gate generating said triggering signal, said first AND gate generating a signal when an output device to function is activated.
Claim 6
Dependent Claim
96 words
In a programmer according to claim 4, the improvement wherein said switching means comprises: a latch circuit, said latch circuit being triggered to a first state by an output from said first AND gate and being triggered to a second state by an output from said second AND gate; and a multiplexer responsive to said latch circuit for coupling said low-frequency timing pulses to said digital timer when said latch circuit is in said first state and for coupling said high-frequency timing pulses to said digital timer when said latch circuit is in said second state.
Claim 7
Dependent Claim
122 words
In a programmer for controlling the sequential operation of a plurality of output devices wherein low-frequency timing pulses are applied to a digital timer which sequentially activates said output devices, means for selectively skipping any of said output devices comprising: a source of high-frequency timing pulses, the frequency of said source of high-frequency timing pulses exceeding the highest rate at which said output devices can function; means for selecting which of said output devices are to function and which are to be skipped; and means responsive to said selecting means for switching the input of said digital timer from said low-frequency timing pulses to said high-frequency timing pulses whereby said digital timer is rapidly sequenced to activate the next selected output device.
Claim 8
Dependent Claim
122 words
In a programmer for controlling the sequential operation of a plurality of output devices wherein low-frequency timing pulses are applied to a digital timer which sequentially activates said output devices, means for selectively skipping any of said output devices comprising: a source of high-frequency timing pulses, the frequency of said source of high-frequency timing pulses exceeding the highest rate at which said output devices can function; means for selecting which of said output devices are to function and which are to be skipped; and means responsive to said selecting means for switching the input of said digital timer from said low-frequency timing pulses to said high-frequency timing pulses whereby said digital timer is rapidly sequenced to activate the next selected output device.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-01-24 | 1975-07-26 | 1976-01-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-01-24 | 1979-07-26 | 1980-01-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-01-24 | 1983-07-26 | 1984-01-25 | $7700.00 | Window Closed / Lapsed |