← Back to Patent Explorer
US3638218A Expired / Lapsed US ⏱️ 0.0 years remaining

Drift compensation system for a cascade-type encoder

Assignee: NEC Corp
•
Filing: 1970-08-31
•
Granted: 1972-01-25
•
Expires: 1990-08-31
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A drift compensation circuit for a cascade encoder used in a pulse code modulation communication system, including at least first, second through m-th encoders connected in cascade for converting an intermittent input analogue signal into an output digital binary signal subject to deterioration in the respective encoders due to drift of the level of direct current utilize to effect energization thereof, comprising first feedback means connected to the first encoder for providing an output of zero level while the input analogue signal is absent therefrom, a reference analogue signal of predetermined level supplied to the second encoder, and second feedback means comparing the levels of digital analogue signals derived from the respective second through m-th encoders and corresponding to the reference analogue signal with a predetermined reference digital binary signal representing the reference analogue signal to provide a signal to activate the second encoder to adjust the levels of the derived digital binary signals to coincide with the level of the reference digital binary signal.

Inventors

  • 👤 Haruo Kaneko
  • 👤 Yoshio Katagiri

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 03:00
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/34; H03M1/38; H03M1/44

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 262 words
A drift-compensating system for a cascade-type encoder having first, second, third, . . . m-th . . . and n-th encoder stages connected in cascade so as to convert an analogue signal into an n-digit binary signal, each said second to n-th encoder stages having means for comparing a reference DC level and incoming analogue signal supplied from a preceding one of said encoder stages to generate a digital output representative of the result of the comparison as a digit of said binary signal, said first encoder stage having said reference DC level at zero level to generate a digital value representative of the polarity of said analogue signal, said system comprising: means coupled to said first encoder stage for maintaining its analogue output at zero level in the idle period where said analogue signal is not applied to its input; means for supplying a predetermined reference analogue signal to said second encoder stage in a period within said idle period, said reference analogue signal being of such a value as does not require said comparison operation for second to (m-1)-th encoder stages but requires the same for m-th encoder stage; a logic means supplied with said digital output from said second to m-th encoder stages for comparing the supplied digital value with a reference digital value representative of said reference analogue signal; and means responsive to the output of said logic means for changing the reference DC level of said second encoder stage so as to make said digital output supplied to said logic means coincide with said reference digital value.
Claim 2
Dependent Claim 262 words
A drift-compensating system for a cascade-type encoder having first, second, third, . . . m-th . . . and n-th encoder stages connected in cascade so as to convert an analogue signal into an n-digit binary signal, each said second to n-th encoder stages having means for comparing a reference DC level and incoming analogue signal supplied from a preceding one of said encoder stages to generate a digital output representative of the result of the comparison as a digit of said binary signal, said first encoder stage having said reference DC level at zero level to generate a digital value representative of the polarity of said analogue signal, said system comprising: means coupled to said first encoder stage for maintaining its analogue output at zero level in the idle period where said analogue signal is not applied to its input; means for supplying a predetermined reference analogue signal to said second encoder stage in a period within said idle period, said reference analogue signal being of such a value as does not require said comparison operation for second to (m-1)-th encoder stages but requires the same for m-th encoder stage; a logic means supplied with said digital output from said second to m-th encoder stages for comparing the supplied digital value with a reference digital value representative of said reference analogue signal; and means responsive to the output of said logic means for changing the reference DC level of said second encoder stage so as to make said digital output supplied to said logic means coincide with said reference digital value.
Claim 3
Dependent Claim 388 words
A drift compensation circuit for a cascade encoder used in a pulse code modulation communication system, comprising: a source of an intermittent amplitude modulated pulse analogue input signal; at least first and second through m-th encoders; a first input terminal of said first encoder receiving said input analogue signal thereat for conversion into a digital binary signal provided at a first output terminal thereof and representing the polarity of said input analogue signal; each of said second through m-th encoders having an input terminal connected to a first output terminal of a preceding encoder including a first input terminal of said second encoder connected to said first encoder first output terminal for connecting said first through m-th encoders in cascade to produce at said second through m-th encoder first output terminals successive digital binary signals corresponding to said digital binary signal provided at said first encoder first output terminal, whereby said digital binary signals produced at said first through m-th first output terminals are subject to deterioration due to drift of the level of direct current energizing said respective first through m-th encoders; means compensating for said direct current level drift, including: first feedback means interconnecting a second output terminal and a second input terminal of said first encoder for providing a feedback signal to activate said first encoder to provide a zero output signal at said first and second output terminals thereof during a first time period when said input analogue signal is absent from said first encoder first input terminal; means for applying a reference analogue signal of predetermined level to a second input terminal of said second encoder during a second time period within said first time period; and second feedback means interconnecting second output terminals of said respective second through m-th encoders and a third input terminal of said second encoder for comparing the levels of digital binary signals derived from said respective last-mentioned output terminals and corresponding to said reference analogue signal with a predetermined level of a reference digital binary signal representing said reference analogue signal to provide an output signal representing the result of such comparison to activate said second encoder third input terminal to adjust the level of said digital binary signals derived from said last-mentioned output terminals to coincide with said predetermined level of said reference digital binary signal.
Claim 4
Dependent Claim 388 words
A drift compensation circuit for a cascade encoder used in a pulse code modulation communication system, comprising: a source of an intermittent amplitude modulated pulse analogue input signal; at least first and second through m-th encoders; a first input terminal of said first encoder receiving said input analogue signal thereat for conversion into a digital binary signal provided at a first output terminal thereof and representing the polarity of said input analogue signal; each of said second through m-th encoders having an input terminal connected to a first output terminal of a preceding encoder including a first input terminal of said second encoder connected to said first encoder first output terminal for connecting said first through m-th encoders in cascade to produce at said second through m-th encoder first output terminals successive digital binary signals corresponding to said digital binary signal provided at said first encoder first output terminal, whereby said digital binary signals produced at said first through m-th first output terminals are subject to deterioration due to drift of the level of direct current energizing said respective first through m-th encoders; means compensating for said direct current level drift, including: first feedback means interconnecting a second output terminal and a second input terminal of said first encoder for providing a feedback signal to activate said first encoder to provide a zero output signal at said first and second output terminals thereof during a first time period when said input analogue signal is absent from said first encoder first input terminal; means for applying a reference analogue signal of predetermined level to a second input terminal of said second encoder during a second time period within said first time period; and second feedback means interconnecting second output terminals of said respective second through m-th encoders and a third input terminal of said second encoder for comparing the levels of digital binary signals derived from said respective last-mentioned output terminals and corresponding to said reference analogue signal with a predetermined level of a reference digital binary signal representing said reference analogue signal to provide an output signal representing the result of such comparison to activate said second encoder third input terminal to adjust the level of said digital binary signals derived from said last-mentioned output terminals to coincide with said predetermined level of said reference digital binary signal.
Claim 5
Dependent Claim 50 words
The drift compensation circuit according to claim 2 in which said second feedback means includes logical means having a plurality of input terminals connected to said second output terminals of said respective second through m-th encoders and an output terminal connected to said third input terminal of said second encoder.
Claim 6
Dependent Claim 35 words
The drift compensation circuit according to claim 3 in which said second feedback means includes a low pass filter connected between said logical means output terminal and said third input terminal of said second encoder.
Claim 7
Dependent Claim 59 words
The drift compensation circuit according to claim 2 in which said second feedback means includes: logical means having a plurality of input terminals connected to said second output terminals of said second through m-th encoders and having an output terminal; and filter means connected between said logical means output terminal and said third input terminal of said second encoder.
Claim 8
Dependent Claim 445 words
A drift compensation circuit for a cascade encoder used in a pulse code modulation communication system, comprising: a source of an intermittent amplitude modulated pulse analogue signal; at least first, seconD through m-th encoders; a first input terminal of said first encoder receiving said input analogue signal for conversion into a digital binary signal provided at a first output terminal thereof and representative of the polarity of said input analogue signal; each of said second through m-th encoders having an input terminal connected to a first output terminal of a preceding encoder including a first input terminal of said second encoder connected to said first encoder first output terminal for connecting said second through m-th encoders in cascade to produce at said second through m-th encoder first output terminals successive digital binary signals corresponding to said digital binary signal provided at said first encoder first output terminal, whereby said digital binary signals produced at said first through m-th encoder first output terminals are subject to deterioration due to drift of the level of direct current energizing said respective first through n-th encoders; and means compensating for said direct current level drift, including: first feedback means interconnecting a second output terminal and a second input terminal of said first encoder for providing a feedback signal to activate said first encoder to provide a zero output signal at said first and second output terminals thereof during a first time period when said input analogue signal is absent from said first encoder first input terminal; means for applying a reference analogue signal of predetermined level to a second input terminal of said second encoder during a second time period within said first time period; and second feedback means interconnecting second output terminals of said respective second through m-th encoders and a third input terminal of said second encoder, consisting of: logical means having a plurality of input terminals connected to said second output terminals of said second through m-th encoders for comparing the levels of digital binary signals derived from said respective last-mentioned output terminals and corresponding to said reference analogue signal with a predetermined level of a reference digital binary signal representing said reference analogue signal to provide at an output terminal of said logical means an output signal representing the result of such comparison; and filter means connecting said logical means output terminal to said second encoder third input terminal to apply thereto said logical means output signal to activate said second encoder to adjust the level of said digital binary signals derived from said second output terminals of said second through m-th encoders to coincide with said predetermined level of said reference digital binary signal.
Claim 9
Dependent Claim 445 words
A drift compensation circuit for a cascade encoder used in a pulse code modulation communication system, comprising: a source of an intermittent amplitude modulated pulse analogue signal; at least first, seconD through m-th encoders; a first input terminal of said first encoder receiving said input analogue signal for conversion into a digital binary signal provided at a first output terminal thereof and representative of the polarity of said input analogue signal; each of said second through m-th encoders having an input terminal connected to a first output terminal of a preceding encoder including a first input terminal of said second encoder connected to said first encoder first output terminal for connecting said second through m-th encoders in cascade to produce at said second through m-th encoder first output terminals successive digital binary signals corresponding to said digital binary signal provided at said first encoder first output terminal, whereby said digital binary signals produced at said first through m-th encoder first output terminals are subject to deterioration due to drift of the level of direct current energizing said respective first through n-th encoders; and means compensating for said direct current level drift, including: first feedback means interconnecting a second output terminal and a second input terminal of said first encoder for providing a feedback signal to activate said first encoder to provide a zero output signal at said first and second output terminals thereof during a first time period when said input analogue signal is absent from said first encoder first input terminal; means for applying a reference analogue signal of predetermined level to a second input terminal of said second encoder during a second time period within said first time period; and second feedback means interconnecting second output terminals of said respective second through m-th encoders and a third input terminal of said second encoder, consisting of: logical means having a plurality of input terminals connected to said second output terminals of said second through m-th encoders for comparing the levels of digital binary signals derived from said respective last-mentioned output terminals and corresponding to said reference analogue signal with a predetermined level of a reference digital binary signal representing said reference analogue signal to provide at an output terminal of said logical means an output signal representing the result of such comparison; and filter means connecting said logical means output terminal to said second encoder third input terminal to apply thereto said logical means output signal to activate said second encoder to adjust the level of said digital binary signals derived from said second output terminals of said second through m-th encoders to coincide with said predetermined level of said reference digital binary signal.

References Cited (Backward Citations)

US3070786A Cited
US3460122A Cited
US3521273A Cited
US3495233A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-01-24 1975-07-26 1976-01-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-01-24 1979-07-26 1980-01-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-01-24 1983-07-26 1984-01-25 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag