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US3646441A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital radio communication systems using repeaters operating at same frequency

Assignee: Individual
•
Filing: 1969-12-05
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Granted: 1972-02-29
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Expires: 1989-12-05
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Abstract

Abstract Communication systems using a repeater or a chain of repeaters each of which receives information during one portion of a cycle of operation and transmits at the same frequency during a subsequent portion of the cycle in a manner to avoid interference. Digital circuitry is provided for transmitting, repeating and receiving digital signals in a manner such that no information is lost and good spectrum utilization and high fidelity are achieved without compounding distortion and noise effects, permitting use of a large number of relatively low-power repeaters. Delta modulator and demodulator means are provided for converting voice or other analog signals to digital signals and for reconverting the digital signals to analog signals. Radio waves of one frequency can be used and a mobile unit can be moved from the field of a base unit to that of a repeater or from the field of one repeater to that of another, without interruption in communication.

Inventors

  • 👤 Henry Magnuski

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 13:49
CPC Classifications
H; H04; H04B; H04B7/00; H04B7/14; H04B7/15; H04B7/155; H04B7/15528; H04B7/15542

Claims Analysis

Total Claims: 26
Claim 1
Independent Claim 153 words
In a communication system, a transmitter comprising: input and output channels, cyclically operable clock means, and regulating means controlled by said clock means for supplying an output signal to said output channel modulated in accordance with an information signal applied to said input channel with said output signal being developed only during a portion of each cycle of operation of said clock means having a maximum duration equal to one-half of the Duration of one complete cycle, said output signal being an on-off digitally modulated signal, said regulating means comprising input means coupled to said input channel to supply a digital control signal derived from said information signal, and control means responsive to said control signal for developing said digitally modulated output signal, said digital control signal having a certain bit rate, and said digitally modulated output signal being developed at a bit rate equal to at least twice said certain bit rate.
Claim 2
Dependent Claim 153 words
In a communication system, a transmitter comprising: input and output channels, cyclically operable clock means, and regulating means controlled by said clock means for supplying an output signal to said output channel modulated in accordance with an information signal applied to said input channel with said output signal being developed only during a portion of each cycle of operation of said clock means having a maximum duration equal to one-half of the Duration of one complete cycle, said output signal being an on-off digitally modulated signal, said regulating means comprising input means coupled to said input channel to supply a digital control signal derived from said information signal, and control means responsive to said control signal for developing said digitally modulated output signal, said digital control signal having a certain bit rate, and said digitally modulated output signal being developed at a bit rate equal to at least twice said certain bit rate.
Claim 3
Dependent Claim 33 words
In a system as defined in claim 1, a plurality of bits of digital information being developed on said output channel during said portion of each cycle of operation of said clock means.
Claim 4
Dependent Claim 31 words
In a system as defined in claim 1, one bit of digital information being developed on said output channel during said portion of each cycle of operation of said clock means.
Claim 5
Dependent Claim 26 words
In a system as defined in claim 1, said input means comprising a modulator arranged to convert an analog input signal to a digital control signal.
Claim 6
Dependent Claim 14 words
In a system as defined in claim 4, said modulator being a Delta modulator.
Claim 7
Dependent Claim 59 words
In a system as defined in claim 1, a receiver comprising: an input channel arranged to receive said digitally modulated transmitter output signal, an output channel, and demodulation means arranged to respond to the received digitally modulated signal to apply to said receiver output channel a digitally modulated signal at a bit rate equal to said certain bit rate.
Claim 8
Dependent Claim 86 words
In a system as defined in claim 1, said control means comprising a plurality of digital storage means, means operable during each cycle of operation of said clock means to sequentially apply said digital control signal to said plurality of storage means, and means for sequentially controlling transfer of signals from said plurality of storage means to said output channel with signals being applied from one of said storage means to said output channel while said control signal is applied to another of said storage means.
Claim 9
Dependent Claim 56 words
In a system as defined in claim 7, said digital control signal having a certain bit rate, each of said storage means comprising a shift register having a number of stages equal to the duration of said portion of each cycle of operation of said clock means divided by the duration of one bit signal interval.
Claim 10
Dependent Claim 85 words
In a system as defined in claim 8, said clock means being arranged to supply a first clock signal at a rate equal to said certain bit rate and a second clock signal at a rate at least equal to twice said certain bit rate, means for applying said first clock signal to each shift register during application of said digital control signal thereto, and means for applying said second clock signal to each shift register during transfer of signals therefrom to said output channel.
Claim 11
Dependent Claim 67 words
In a system as defined in claim 1, a repeater comprising: an input channel arranged to receive said transmitter output signal, an output channel, and transmission delay means responsive to the received transmitter output signal to develop on said repeater output channel a delayed signal corresponding to each modulated portion of the received signal with a delay at least equal to the duration of said modulated portion.
Claim 12
Dependent Claim 40 words
In a system as defined in claim 10, said transmitter and said repeater respectively including radio wave transmitting and receiving for transmitting said transmitter output signal from said transmitter output channel and receiving said signal at said repeater input channel.
Claim 13
Dependent Claim 22 words
In a system as defined in claim 11, said repeater comprising radio wave transmission means for transmitting said repeater output channel signal.
Claim 14
Dependent Claim 22 words
In a system as defined in claim 12, said transmitter and repeater radio wave transmission means being operative at the same frequency.
Claim 15
Dependent Claim 46 words
In a system as defined in claim 11, said radio wave receiving means at said repeater comprising antenna means having a directional pattern such as to increase sensitivity to radio waves tRansmitted from said transmitter and to decrease sensitivity to radio waves eminating from other directions.
Claim 16
Dependent Claim 76 words
In a system as defined in claim 10, a at least one additional repeater comprising: an input channel arranged to receive the first repeater output signal, an output channel, and transmission delay means responsive to the received first repeater output signal to develop on said second repeater output channel a delayed signal corresponding to each modulated portion of said second repeater received signal with a delay at least equal to the duration of said modulated portion.
Claim 17
Dependent Claim 79 words
In a system as defined in claim 15, said transmitter and said first repeater respectively including radio wave transmitting and receiving means for transmitting said transmitter output signal from said transmitter output channel and receiving said signal at said repeater input channel, and said first and second repeaters respectively including radio wave transmitting and receiving means for transmitting said first repeater output signal from said first repeater output channel and receiving said signal at said second repeater input channel.
Claim 18
Dependent Claim 20 words
In a system as defined in claim 16, said transmitting and receiving means being all operative at the same frequency.
Claim 19
Dependent Claim 48 words
In a system as defined in claim 16, said radio wave receiving means at said second repeater comprising antenna means having a directional pattern such as to increase sensitivity to radio waves transmitted from said first repeater and to decrease sensitivity to radio waves eminating from other directions.
Claim 20
Dependent Claim 51 words
In a system as defined in claim 16, said radio wave transmitting means at said first repeater comprising antenna means having a directional pattern such as to increase the field strength of radio waves transmitted to said second repeater while decreasing the field strength of radio waves transmitted in other directions.
Claim 21
Dependent Claim 163 words
In a communication system, a repeater for receiving transmitted signals modulated by bits of digital information on a clock cycle of a certain frequency with modulation occurring only during an initial portion of each cycle having a maximum duration equal to one-half of the duration of the complete cycle and with each bit of digital information occurring at a predetermined time in relation to the start of the cycle, said repeater comprising: input and output channels, said input channel being arranged to receive said transmitted signals, clock means controlled in response to received signals from said input channel to develop a clock signal of said certain frequency, storage and delay means responsive to received signals from said input channel and controlled from said clock signal for responding to each bit of received digital information and applying a bit of corresponding informational content to said output channel with a fixed delay at least equal to the duration of said initial portion of the cycle.
Claim 22
Dependent Claim 163 words
In a communication system, a repeater for receiving transmitted signals modulated by bits of digital information on a clock cycle of a certain frequency with modulation occurring only during an initial portion of each cycle having a maximum duration equal to one-half of the duration of the complete cycle and with each bit of digital information occurring at a predetermined time in relation to the start of the cycle, said repeater comprising: input and output channels, said input channel being arranged to receive said transmitted signals, clock means controlled in response to received signals from said input channel to develop a clock signal of said certain frequency, storage and delay means responsive to received signals from said input channel and controlled from said clock signal for responding to each bit of received digital information and applying a bit of corresponding informational content to said output channel with a fixed delay at least equal to the duration of said initial portion of the cycle.
Claim 23
Dependent Claim 100 words
In a system as defined in claim 20, for receiving transmitted signals wherein there are a plurality of bits of digital information during said initial portion of each cycle, said storage and delay means comprising a shift register having an input to which said received signals are applied from said input channel and having an output, gate means for applying signals from said output to said output channel, and counter means responsive to said clock signal for closing said gate means during the initial portion of a cycle and opening said gate means during a later portion of a cycle.
Claim 24
Dependent Claim 63 words
In a system as defined in claim 20, for receiving transmitted signals wherein there is one bit of digital information in each cycle, said storage and delay means comprising a flip-flop circuit having a set input coupled to said input channel and an output coupled to said output channel, and means for applying clock signals from said clock circuit to said flip-flop circuit.
Claim 25
Dependent Claim 165 words
In a communication system, a receiver for receiving transmitted signals modulated by bits of digital information on a Clock cycle of a certain frequency with a plurality of bits of digital information at a certain bit rate in an initial portion of each cycle having a maximum duration equal to one-half of the complete cycle, said receiver comprising: input and output channels, shift register means for receiving digitally modulated signals from said input channel and applying said digitally modulated signals to said output channel, clock means arranged to supply a first clock signal at a rate equal to said certain bit rate and a second clock signal at a rate at least equal to twice said certain bit rate, means for applying said second clock signal to said shift register means during application of said digitally modulated signal from said input channel thereto, and means for applying said first clock signal to said shift register means during transfer of signals therefrom to said output channel.
Claim 26
Dependent Claim 165 words
In a communication system, a receiver for receiving transmitted signals modulated by bits of digital information on a Clock cycle of a certain frequency with a plurality of bits of digital information at a certain bit rate in an initial portion of each cycle having a maximum duration equal to one-half of the complete cycle, said receiver comprising: input and output channels, shift register means for receiving digitally modulated signals from said input channel and applying said digitally modulated signals to said output channel, clock means arranged to supply a first clock signal at a rate equal to said certain bit rate and a second clock signal at a rate at least equal to twice said certain bit rate, means for applying said second clock signal to said shift register means during application of said digitally modulated signal from said input channel thereto, and means for applying said first clock signal to said shift register means during transfer of signals therefrom to said output channel.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-02-28 1975-08-30 1976-02-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-02-28 1979-08-30 1980-02-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-02-28 1983-08-30 1984-02-29 $7700.00 Window Closed / Lapsed

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