Differential trigger circuit

Claim 2

A differential trigger circuit including in combination: a first source of operating current; input switch means coupled to the first source of operating current and having first and second outputs for switching operating current from said source to said outputs; differential switch means including at least first and second transistors, each having collector, base, and emitter electrodes, with the emitter electrodes thereof being connected together at a first common junction; first and second voltage supply terminals adapted for connection across a supply potential; a second current source connected between the first common junction and the first supply terminal; a third current source connected between the second supply terminal and the collector of the first transistor; means connecting the first output of the input switch means with the base of the first transistor; means connecting the second output of the input switch means with the base of the second transistor; and means connecting the collector of the first transistor with the second output of the input switch means, the collector of the second transistor providing an output from the trigger circuit; and feedback circuit means interconnecting the first and second outputs of the input switch means.

Claim 3

The combination according to claim 1 wherein the feedback circuit means includes first and second resistors connected together in series at a second junction between the first and second outputs of the input switch means and further includes means connected with the second junction for establishing a predetermined potential at said second junction.

Claim 4

The combination according to claim 1 wherein the first and second transistors are first and second switching transistors and further including first and second input transistors, each including collector, base, and emitter electrodes, with the collector electrodes of the first and second input transistors being coupled with the second voltage supply terminal, the base electrode of the first input transistor being coupled with the first output of the input switch means, the emitter electrode of the first input transistor being connected to the base electrode of the first switching transistor, the emitter electrode of the second input transistor being connected to the base electrode of the second switching transistor, and the base electrode of the second input transistor being coupled with the second output of the input switch means.

Claim 5

The combination according to claim 1 wherein the input switch means comprises a second differential switch means including third and fourth transistors, each having collector, base, and emitter electrodes, with the base electrodes of the third and fourth transistors adapted to receive an input signal, the emitter electrodes being connected with the source of operating current, and the collector electrodes of the third and fourth transistors comprising the firSt and second outputs.

Claim 6

The combination according to claim 4 further including first and second emitter resistors with the first emitter resistor connected between the source of operating current and the emitter electrode of the third transistor and the second emitter resistor connected between the source of operating current and the emitter electrode of the fourth transistor.

Claim 7

The combination according to claim 5 wherein the source of operating current is a constant current source connected between the second voltage supply terminal and the junction of the first and second emitter resistors, and the current supplied by the second current source is less than the current supplied by the first or third current sources.

Claim 8

A differential trigger circuit including in combination: a first differential switch means including first and second transistors, each having a collector, base, and emitter; means for supplying input signals to the bases of the first and second transistors; a first current source coupled with the emitters of the first and second transistors; a second differential switch means including at least third and fourth transistors, each having a collector, base, and emitter, with the emitters thereof being connected together at a first junction; means for connecting the base of the third transistor with the collector of the first transistor; means for connecting the base of the fourth transistor with the collector of the second transistor; first and second voltage supply terminals adapted for connection across a source of operating potential; a second current source connected between the first junction and the first voltage supply terminal; a third current source connected between the second voltage supply terminal and the collector of the third transistor; first feedback means interconnecting the collector of the third transistor with the base of the fourth transistor; second feedback circuit means interconnecting the bases of the third and fourth transistors, the collector of the fourth transistor providing an output from said trigger circuit.

Claim 9

A differential trigger circuit including in combination: a first differential switch means including first and second transistors, each having a collector, base, and emitter; means for supplying input signals to the bases of the first and second transistors; a first current source coupled with the emitters of the first and second transistors; a second differential switch means including at least third and fourth transistors, each having a collector, base, and emitter, with the emitters thereof being connected together at a first junction; means for connecting the base of the third transistor with the collector of the first transistor; means for connecting the base of the fourth transistor with the collector of the second transistor; first and second voltage supply terminals adapted for connection across a source of operating potential; a second current source connected between the first junction and the first voltage supply terminal; a third current source connected between the second voltage supply terminal and the collector of the third transistor; first feedback means interconnecting the collector of the third transistor with the base of the fourth transistor; second feedback circuit means interconnecting the bases of the third and fourth transistors, the collector of the fourth transistor providing an output from said trigger circuit.

Claim 10

The combination according to claim 7 wherein the means for connecting the emitters of the first and second transistors with the source of operating current includes first and second emitter resistors connected together at a second junction in series between the emitters of the first and second transistors, with the first current source being connected between the second junction and the second voltage supply terminal.

Claim 11

The combination according to claim 8 wherein the second feedback means includes first and second resistances connected together at a third junction in series between the collectors of the first and second transistors, and further includes means coupled between the third junction and the first voltage supply terminal for establishing a predetermined potential at the third junction.

Claim 12

The combination according to claim 8 wherein the trigger circuit is an integrated circuit and the first, second, and third current sources are constant current sources, with the first and second current sources providing a higher current than the third current source and wherein the first and second differential switch means include transistors of opposite conductivity types, respectively.

Claim 13

The combination according to claim 10 wherein the first and second transistors are lateral PNP-transistors and the third and fourth transistors are NPN-transistors.

Claim 14

The combination according to claim 11 wherein the means for connecting the base of the third transistor with the collector of the first transistor includes a fifth NPN-transistor having a collector, base, and emitter, with the emitter of the fifth transistor being connected to the base of the third transistor, the base of the third transistor being connected to the collector of the first transistor, and the collector of the fifth transistor is connected with the second voltage supplY terminal, and further wherein the means for connecting the base of the fourth transistor with the collector of the second transistor includes a sixth NPN-transistor having a collector, base, and emitter with the emitter of the sixth transistor being connected to the base of the fourth transistor, the base of the sixth transistor being connected to the collector of the second transistor, and the collector of the sixth transistor being connected with the second voltage supply terminal.

Claim 15

The combination according to claim 10 wherein the means for establishing a predetermined potential at the junction at the first and second resistance means includes a plurality of diode junctions connected between the third junction and the first voltage supply terminal and further wherein the first and second current sources supply equal currents of opposite polarity and the third current source supplies current of the same polarity as the first current source and of substantially one-half the magnitude of the currents supplied by the first and second current sources.