Analog-to-digital converter

Claim 2

An analog-to-digital converter circuit comprising: voltage comparator means adapted to receive an input voltage, a plurality of detector gates connected To said comparator and responsive to different values of input voltage applied thereto for generating a control effect, means for generating a reference frequency, a countdown divider responsive to said control effect to count down said reference frequency applied thereto in a ratio corresponding to said control effect, and gating means responsive to said reference frequency for deriving from said reference frequency an analog signal representing the logarithm of the number of pulses applied thereto and for interrupting the output pulses from said countdown divider when said analog signal attains the value of said input voltage.

Claim 3

An analog-to-digital converter circuit as set forth in claim 1, including an adder circuit means for applying to said adder circuit incoming analog voltages representative of two variable conditions of a system together with said analog signal, said input voltage being derived from the output of said adder circuit.

Claim 4

An analog-to-digital converter as set forth in claim 2, further including storage and sampling means connected to said adder for storing the incoming analog voltages during a first portion of a measurement cycle and sampling the incoming signal during a second portion of the measurement cycle.

Claim 5

An analog-to-digital converter for converting an input signal representative of two variable conditions of a system into digital signals representative of the real life usage of the system comprising, voltage comparator means adapted to receive an input voltage and having a series of voltage reference steps, coincidence detector gate connected at each step and adapted to occupy one state when the input signal is less than the reference voltage value at that reference step and another state when the input signal is more than the reference voltage value at that reference step such that one coincidence gate is actuated to detect the zone where a transition of states occurs, a corresponding group of countdown selector gates connected to the coincidence detector gates such that the particular detector gate actuated operates a corresponding countdown selector gate to count down an input reference frequency and gating means responsive to said reference frequency for deriving an analog signal representing the logarithm of the number of pulses applied thereto and for interrupting the output pulses from said countdown divider when said analog signal attains the value of said input voltage.

Claim 6

An analog-to-digital converter for converting an input signal representative of two variable conditions of a system into digital signals representative of the real life usage of the system comprising, voltage comparator means adapted to receive an input voltage and having a series of voltage reference steps, coincidence detector gate connected at each step and adapted to occupy one state when the input signal is less than the reference voltage value at that reference step and another state when the input signal is more than the reference voltage value at that reference step such that one coincidence gate is actuated to detect the zone where a transition of states occurs, a corresponding group of countdown selector gates connected to the coincidence detector gates such that the particular detector gate actuated operates a corresponding countdown selector gate to count down an input reference frequency and gating means responsive to said reference frequency for deriving an analog signal representing the logarithm of the number of pulses applied thereto and for interrupting the output pulses from said countdown divider when said analog signal attains the value of said input voltage.

Claim 7

An analog-to-digital converter as set forth in claim 4, including an adder circuit, means for applying to said adder circuit the input signal representative of the two variable conditions together with said analog signal to develop said input voltage.

Claim 8

An analog-to-digital converter as set forth in claim 5, further including storage and sampling means connected to said adder circuit for a first portion of a measurement cycle and sampling the input signal during a second portion of the measurement cycle.