Differential amplifier

Claim 2

A differential amplifier comprising: an input amplifying stage having a pair of separate current paths therethrough for passing separate signal inputs; a succeeding amplifying stage having a pair of current paths for receiving the respective amplified current signals from said first amplifying stage; first and second transistors having their collector-emitter circuits connected to the respective outputs of said succeeding stage and an interconnection between the transistors and a bias voltage source; and a high resistance common-mode connection to the collectoremitter circuits of said second transistors from the input amplifying stage such that common-mode signals are deprived of a significant current path to said bias voltage source.

Claim 3

A differential amplifier circuit, comprising: first and second three element transistors having their collector-emitter circuits connected to one another and oppositely poled, the bases of each transistor being connected to receive separate input signals; third and fourth transistors connected to receive at their respective bases the amplified signals from said first and second transistors and having a pair of output terminals; fifth and sixth transistors serially interconnecting the collector-emitter circuits of said third and fourth transistors, said fifth and sixth transistors having their emitter-collector circuits oppositely poled, a voltage bias source, one pole thereof connected to the collector-emitter circuit of said transistors and the common point between the emitter-collector circuits of said fifth and sixth transistors being connected to the other pole of said bias voltage source; and a pair of high impedance interconnection means separately connected between the output terminals and the same element of each of the first and second transistors whereby common-mode signals presented to the bases of said first and second transistors do not generate significant currents through said differential amplifier circuit.

Claim 4

A differential amplifier circuit, comprising: first and second three element transistors having their collector-emitter circuits connected to one another and oppositely poled, the bases of each transistor being connected to receive separate input signals; third and fourth transistors connected to receive at their respective bases the amplified signals from said first and second transistors and having a pair of output terminals; fifth and sixth transistors serially interconnecting the collector-emitter circuits of said third and fourth transistors, said fifth and sixth transistors having their emitter-collector circuits oppositely poled, a voltage bias source, one pole thereof connected to the collector-emitter circuit of said transistors and the common point between the emitter-collector circuits of said fifth and sixth transistors being connected to the other pole of said bias voltage source; and a pair of high impedance interconnection means separately connected between the output terminals and the same element of each of the first and second transistors whereby common-mode signals presented to the bases of said first and second transistors do not generate significant currents through said differential amplifier circuit.

Claim 5

A differential amplifier, a pair of input amplifying stages having a pair of separate current paths for receiving and amplifying respectively a pair of differential signals, a second amplifying stage having a pair of amplifying stages, the outputs of the first amplifying stages being connected separately to the respective inputs of the second stages, a pair of relatively high resistance common-mode connections between the respective outputs of said input stages and said second stage outputs, a voltage bias source for said amplifier, said common-mode connections constituting the sole common-mode current path through the amplifier resulting in relatively small common-mode currents therethrough irrespective of common-mode voltage signal maGnitudes.

Claim 6

A differential amplifier, a pair of input amplifying stages having a pair of separate current paths for receiving and amplifying respectively a pair of differential signals, a second amplifying stage having a pair of amplifying stages, the outputs of the first amplifying stages being connected separately to the respective inputs of the second stages, a pair of relatively high resistance common-mode connections between the respective outputs of said input stages and said second stage outputs, a voltage bias source for said amplifier, said common-mode connections constituting the sole common-mode current path through the amplifier resulting in relatively small common-mode currents therethrough irrespective of common-mode voltage signal maGnitudes.

Claim 7

A differential amplifier, a pair of amplifying transistors, one electrode of each of said transistors interconnected to separate signal inputs, a voltage bias source, one pole of said voltage bias source being connected to an electrode of each of said transistors, a succeeding pair of transistors complementary to the first-mentioned transistors, an output electrode of the first-mentioned transistors being connected to an input electrode of the said second-mentioned transistors, a further electrode of said second-mentioned transistors being connected to the first-mentioned pole of said voltage bias source, another of said electrodes of each of said second-mentioned transistors providing the output of the amplifier, and to the collector-emitter circuits of a third pair of transistors, the bases of said last-named transistors interconnected with the bases of said second-mentioned pair of transistors, and a common point between the third-mentioned set of transistors connected to the other pole of said voltage bias source, and a high resistance connection between said amplifier output and the output electrodes of said first-mentioned pair of transistors for establishing a relatively low current path to all common-mode signals present at the input electrodes of said amplifying transistors irrespective of common mode voltage signal amplitude.

Claim 8

A differential amplifier, a pair of amplifying transistors, one electrode of each of said transistors interconnected to separate signal inputs, a voltage bias source, one pole of said voltage bias source being connected to an electrode of each of said transistors, a succeeding pair of transistors complementary to the first-mentioned transistors, an output electrode of the first-mentioned transistors being connected to an input electrode of the said second-mentioned transistors, a further electrode of said second-mentioned transistors being connected to the first-mentioned pole of said voltage bias source, another of said electrodes of each of said second-mentioned transistors providing the output of the amplifier, and to the collector-emitter circuits of a third pair of transistors, the bases of said last-named transistors interconnected with the bases of said second-mentioned pair of transistors, and a common point between the third-mentioned set of transistors connected to the other pole of said voltage bias source, and a high resistance connection between said amplifier output and the output electrodes of said first-mentioned pair of transistors for establishing a relatively low current path to all common-mode signals present at the input electrodes of said amplifying transistors irrespective of common mode voltage signal amplitude.

Claim 9

A differential amplifier, comprising: a pair of input transistor amplifying stages having a pair of separate current paths therethrough for passing and amplifying separate signal inputs; a succeeding amplifying stage containing a pair of transistors having a pair of current paths for receiving the respective amplifier current from said first mentioned amplifying stage; feedback connection from the succeeding transistors of the succeeding amplifying stage to each of the preceding amplifying transistors in each of said current paths; a common-mode connection to the emitters of each of the transistors in the succeeding amplifying stage; means for maintaining a constant current in said common-mode connection, said means including the collector-emitter circuits of a pair of transistors, one each of said transistors in series with the collector-emitter circuit of one of each of said succeeding pair of transistors; an interconnection between the third mentioned pair of transistors and a bias voltage source; the collector emitter circuit of said third mentioned transistors forming a high resistance common mode connection to the collector-emitter circuit of said succeeding pair of transistors, whereby common-mode signals are deprived of a significant current path to said bias voltage source.

Claim 10

A differential amplifier, comprising: a pair of input transistor amplifying stages having a pair of separate current paths therethrough for passing and amplifying separate signal inputs; a succeeding amplifying stage containing a pair of transistors having a pair of current paths for receiving the respective amplifier current from said first mentioned amplifying stage; feedback connection from the succeeding transistors of the succeeding amplifying stage to each of the preceding amplifying transistors in each of said current paths; a common-mode connection to the emitters of each of the transistors in the succeeding amplifying stage; means for maintaining a constant current in said common-mode connection, said means including the collector-emitter circuits of a pair of transistors, one each of said transistors in series with the collector-emitter circuit of one of each of said succeeding pair of transistors; an interconnection between the third mentioned pair of transistors and a bias voltage source; the collector emitter circuit of said third mentioned transistors forming a high resistance common mode connection to the collector-emitter circuit of said succeeding pair of transistors, whereby common-mode signals are deprived of a significant current path to said bias voltage source.