System for adjusting the value of a resistance to a predetermined value

Claim 3

A system according to claim 1, said comparator including a reference power supply, one side of said supply being grounded, adjustable electrical resistance means, a read-in contactor for said resistance means, said resistance means being adjusted to value Ro by said read-in contactor, an operations amplifier, one of the inputs of said amplifier being grounded, an ungrounded input and an output for said amplifier, said resistance of value R being connected in parallel between said ungrounded input and said output of said amplifier, said power supply, said last-mentioned means and said amplifier being connected in series, a plurality of comparison units each having a particular and different accuracy connected in parallel and each having two inputs and three outputs, one of said last-named two inputs being directly connected to an ungrounded terminal of said reference power supply, the other of said last-named inputs being connected to said operations amplifier output, first and third outputs of said three outputs of said comparison units furnishing a signal if R is below or above Ro at the accuracy allotted to each of said comparison units and said two putputs indicating if R is equal to Ro at the accuracy allotted to each of said comparison units, and a logic routing circuit, three outputs for said logic circuit receiving data from said comparison units and selecting one of said outputs of said comparators, and said Ro read-in circuit, said store and control circuit and said generator including a group of resistances energized by signals from said clock circuit, a relay connected to said resistances controlled by the data from said three outputs of said logic routing circuit, said relay also Being controlled by the signal output of said logic circuit when said Ro read-in contactor is in a position distinctive of the rank of the highest decade of the value of Ro, an operations amplifier and a capacitance connected in parallel to the output of said group of resistances, said capacitance and said operations amplifier comprising a clock signal integration circuit delivering a ladder voltage, two series connected supplies, one connected to and controlled by the ladder voltage from said operations amplifier and the other of said supplies having its output connected to one of said two terminals of said resistance of value R, said other supply being controlled by said Ro read-in contactor.

Claim 4

A system according to claim 1, said selector being a relay.

Claim 5

A system according to claim 2, the predetermined accuracy for each of said comparison units being read-in by a voltage representing accuracy supplied to said units.

Claim 6

A system according to claim 1 in which the amplitude of the electrical pulses flowing through the resistance of value R grows linearly in a first stage with an amplitude increment of Delta h which depends upon the two values of the square of the resistance $ and upon a parameter characteristic of the geometry of the resistance to be adjusted, the increment being anywhere from zero to the value h 1 at which the difference (R -Ro) epsilon being adjusted becomes equal to a predetermined fraction 1 of the initial difference epsilon (R - Ro)o before adjustment; in a second stage the amplitude is constant at a value h 1 for a maximum time to; and in a third optional stage occurring only if the difference epsilon is greater than the required accuracy of adjustment of the resistance of value R, the amplitude increases linearly at an amplitude increment of Delta h'', the pulse frequency being constant in the first stage and then decreasing in the second and third stages, the decrease being dependent upon the difference epsilon , the same being measured after each of the pulses has flowed through the resistance R.

Claim 7

A system according to claim 5, having a read-in circuit for each of the values Ro, to, P , the parameter characteristic of geometry and the required end-of-adjustment accuracy for R, a store for each of the values epsilon , epsilon 1, Delta h, Delta h'' and h 1, a comparator comparing R and Ro and initially providing epsilon , which is then placed in the epsilon store, then epsilon , a epsilon and epsilon 1 comparator having two inputs, one connected to the epsilon 1 store and the other connected to the output of the R/Ro comparator and having three outputs corresponding to epsilon > epsilon 1, epsilon epsilon 1 and epsilon epsilon 1, a pulse generator for each of the stages, the first generator providing pulses having a linearly increasing amplitude n Delta h, n being the nth pulse transmitted in the first stage, the second generator providing pulses of constant amplitude h 1, the third generator providing pulses of linearly increasing amplitude h 1 + p Delta h'', p being the pth pulse transmitted in the third stage, means for selecting one of the generators, means for selecting the value of Delta h and of Delta h'' in the respective stores, said selecting means being controlled by the read-in circuits for P and for the geometric parameter and controlling the first and third generators, a trigger circuit controlling the third generator, said trigger circuit having two inputs, one connected to a timer and the other connected to the to read-in circuit, a clock circuit controlling the first generator at a fixed repetition frequency through its input connected to the epsilon > epsilon 1 output of the epsilon / epsilon 1 comparator And controlling the second and third generators at a repetition frequency modulated by epsilon through its input connected to the epsilon < or = epsilon 1 output of the comparator, and an ''''accuracy'''' comparator having two inputs, one connected to the ''''accuracy'''' read-in circuit and the other connected to the output of the R/Ro comparator, said ''''accuracy'''' comparator having two outputs, one controlling a stop and zero reset circuit for the adjusting system, the other output controlling a reject circuit for the resistance of value R, the epsilon epsilon 1 output of the epsilon / epsilon 1 comparator being connected to the generator selecting means and to the timer and to the h 1 store, said store being connected to the second and third generators, the selecting means being controlled by the epsilon > epsilon 1 output and by the output of the trigger circuit.

Claim 8

A system according to claim 6, the three pulse generators for the three stages, the means for selecting one of the generators, and the h 1 store being single programmable supply.