Integrated circuits with ion implanted chan stops

Abstract

Abstract D R A W I N G THE SPECIFICATION DESCRIBES A CHAN STOP TECHNIQUE FOR ELIMINATING SPURIOUS INVERSION OF THE SURFACE OF A SEMICONDUCTOR INTEGRATED CIRCUIT CHIP DUE TO CAPACITIVE COUPLING BBETWEEN THE METALLIZATION AND/OR THE FIELD OXIDE AND THE SEMICONDUCTOR. SPURIOUS INVERSION IS CONVENTIONALLY OVERCOME BY PROVIDING A LOW RESISTIVITY REGION, COMMONLY REFERRED TO AS A CHAN STOP, UNIFORRMLY UNDER THE FIELD OXIDE. IN MAKING DEVICES USING ION IMPLATION TECHNIQUES, THE CHANNEL OR ACTIVE REGION IS FIRST MASKED AND THE CHAN STOP IS FORMED BY IMPLANTATION OR DIFFUSION. AFTER THE FIELD OXIDE IS GROWN, THE MASK FOR FORMING THE CHANNEL WINDOW MUST BE ALIGNED WITH THE REGION PREVIOUSLY MASKED. THIS ALIGNMENT AND THE FIRST MASKING STEP ARE ELIMINATED IN THE PROCESS DESCRIBED BY FORMING A UNIFORM CHAN STOP IMPLANT AND COMPENSATING THE CHAN STOP IMPURITIES IN THE CHANNEL REGION BY A COMPENSATION IMPLANT THROUGH THE CHANNEL WINDOW. THE CHAN STOP AND CHANNEL ARE THEREBY SELF-ALIGNED.

Inventors

• 👤 R Moline

Bibliographic Details