Apparatus for controlling output data rate

Claim 2

Apparatus for automatically controlling the output data rate of an electronic device generating data from a digital source, said data including data words each having a control bit, said apparatus comprising: an output terminal; first storage means adapted to be coupled to said digital source and being operative to store data words received from said digital source, said first storage means operating at a first predetermined rate; output storage means including an output buffer stage and being coupled between said first storage means and said output terminal, said output storage means being operative to store data words received from said first storage means and to transmit said data words via said output buffer stage to said output terminal at a second predetermined rate; and means operative to determine the presence in the first storage means and output storage means of data words and to determine the presence in the output buffer stage of a control bit of a data word, said means being operative in response to determining the presence of a first data word in the first storage means, a second data word in the output storage means, and the control bit of a third data word in the output buffer stage to adjust the length of the control bit in the output buffer stage while leaving the first and second data words in thE first storage means and output storage means, respectively, unchanged.

Claim 3

Apparatus for automatically controlling the output data rate of an electronic device generating data from a digital source, said data including data words each having a control bit, said apparatus comprising: an output terminal; first storage means adapted to be coupled to said digital source and being operative to store data words received from said digital source at a first predetermined rate; output storage means including an output buffer stage and being coupled between said output terminal and said first storage means and being operative to store data words received from said first storage means and to transfer said data words to said output terminal via said output buffer stage at a second predetermined rate; shifting means having an output connection coupled to said output buffer stage and an input connection and being operative in response to a coded signal at its input connection to generate at its output connection shift pulses at a predetermined rate dependent upon said coded signal; sensing means coupled to the input connection of the shifting means and operative to determine the presence in the first storage means and output storage means of data words and to determine the presence in the output buffer stage of a control bit of a data word, said sensing means being operative in response to determining the presence of a first data word in the first storage means, a second data word in the output storage means, and the control bit of a third data word in the output buffer stage to produce a coded signal at the input connection of the shifting means to change the predetermined rate of said shifting means thereby changing the rate of the data being transmitted from said output buffer stage.

Claim 4

Apparatus for automatically controlling the output data rate of an electronic device generating data from a digital source, said data including data words each having a control bit, said apparatus comprising: an output terminal; first storage means adapted to be coupled to said digital source and being operative to store data words received from said digital source at a first predetermined rate; output storage means including an output buffer stage and being coupled between said output terminal and said first storage means and being operative to store data words received from said first storage means and to transfer said data words to said output terminal via said output buffer stage at a second predetermined rate; shifting means having an output connection coupled to said output buffer stage and an input connection and being operative in response to a coded signal at its input connection to generate at its output connection shift pulses at a predetermined rate dependent upon said coded signal; sensing means coupled to the input connection of the shifting means and operative to determine the presence in the first storage means and output storage means of data words and to determine the presence in the output buffer stage of a control bit of a data word, said sensing means being operative in response to determining the presence of a first data word in the first storage means, a second data word in the output storage means, and the control bit of a third data word in the output buffer stage to produce a coded signal at the input connection of the shifting means to change the predetermined rate of said shifting means thereby changing the rate of the data being transmitted from said output buffer stage.

Claim 5

Apparatus according to claim 2 further including a compressed shift enabling means having a first input connection coupled to said first storage means, a second input connection coupled to said output storage means and an output connection coupled to said first storage means and said output storage means and being operative in response to data being stored in said first storage means and no data stored in said output storage means to cause the data stored in said first storage means to be transferred to said output storage means.

Claim 6

Apparatus according to claim 3 wherein said first storage means includes: first gating means having a first input connection adapted to be coupled to the digital source, a second input connection and an output connection and being operative in response to a first enabling signal at its second input connection to pass the data from said digital source at its first input connection to its output connection; second gating means having a first input connection coupled to the second input connection of said first gating means, a second input connection coupled to the output connection of said enabling means and an output connection and being operative in response to a signal at either its first or second input connection to generate a signal at its output connection; first shift pulse generating means having an input connection connected to the output connection of said second gating means and an output connection and being operative to generate a series of shift pulses at its output connection in response to a signal at its input connection; a first storage register having a plurality of stages and having a first input connection coupled to the output connection of said first gating means, a second input connection coupled to the output connection of said first shift pulse generating means, a first output connection coupled to the input connection of said output storage means, a second output connection from one of said plurality of stages and being operative in response to a shift pulse at its second input connection to sequentially transfer data from its first input connection to its first output connection; and first indicator means having an input connection connected to the second output connection of said first storage register and output connections coupled to said sensing means and said enabling means and being operative in response to a predetermined number of bits stored in said first storage register to generate an output signal at its output connection.

Claim 7

Apparatus according to claim 3 wherein said output storage means includes: third gating means having a first input connection coupled to said shifting means, a second input connection coupled to said enabling means and an output connection and being operative in response to a signal at either its first or second input connection to generate an output signal at its output connection; second shift pulse generating means having an input connection coupled to the output connection of said third gating means and an output connection, and being operative in response to an output signal from said third gating means to generate a shift pulse at its output connection; a second storage register having a plurality of stages, a first input connection coupled to the output connection of said first storage means, a second input connection connected to the output connection of said second shift pulse generating means, a first output connection coupled to said output buffer stage and a second output connection from one of said plurality of stages of said second storage register, said second storage register being operative in response to shift pulses at its second input connection to transfer data from said first storage means through said plurality of stages to said output buffer stage; and second indicator means having an input connection coupled to the second output connection of said second storage register and output connections coupled to said enabling means and to said sensing means, said second indicator means being operative in response to a predetermined signal at its input connection to generate a predetermined signal at its output connection indicating that said second storage register has a predetermined number of bits stored therein.

Claim 8

Apparatus according to claim 2 wherein said shifting means includes: a low frequency clock source operative to generate a low frequency clock signal; and a counter having a predetermined number of stages, each of said stages having an input connection coupled to said sensing means and adapted to receive a preset signal, said counter being operative to divide the low frequency clock signal by a predetermined number determined by said preset signal to thereby determine the rate of the data being transferred from said output buffer to said output terminal.

Claim 9

Apparatus according to claim 2 wherein said sensing means includes: means for counting bits per character having an input connection coupled to said shifting means and an output connection and being operative to generate a signal at its output connection when a predetermined bit of a character to be transmitted is in said output buffer stage; and code generating means having input connections coupled to said means for counting, said first storage means and said output storage means and an output connection coupled to said shifting means and being operative in response to the presence or absence of data in said first storage means and in said output storage means when the signal is generated at the output connection of said means for counting to generate said coded signal at its output connection.

Claim 10

Apparatus according to claim 7 wherein said means for counting bits per character includes: decoder means having a predetermined number stored therein; and counter circuit having a first input connection coupled to said shifting means and an output connection coupled to said code generating means and being operative in response to a shifting signal at its first input connection to advance the count in steps from said predetermined number of said decoder means and to generaTe an output signal at the output connection of said counter circuit when the count reaches a second predetermined number.

Claim 11

Apparatus according to claim 7 wherein said code generating means includes: fourth gating means having input connections from said first storage means, said output storage means and said means for counting bits per character and an output connection and being operative in response to signals at its input connections indicating the presence of data in said first storage means and said output storage means coincident with the signal from said means for counting bits per character to generate a first signal condition and being operative in response to the absence of data in said output storage means and the presence of data in said first storage means and coincident with the signal from said means for counting bits per character to generate a second signal condition; and up/down counter means having an input connection coupled to said fourth gating means and an output connection coupled to the input connection of said shifting means and being operative to generate a first coded signal at its output connection indicating the second signal condition of said fourth gating means and to change the coded signal in a predetermined manner in response to the first signal condition generated by said fourth gating means.

Claim 12

Apparatus according to claim 4 wherein said output storage means includes: third gating means having a first input connection coupled to said shifting means, a second input connection coupled to said enabling means and an output connection and being operative in response to a signal at either its first or second input connection to generate an output signal at its output connection; second shift pulse generating means having an input connection coupled to the output connection of said third gating means and an output connection, and being operative in response to an output signal from said third gating means to generate a shift pulse at its output connection; a second storage register having a plurality of stages, a first input connection coupled to the output connection of said first storage means, a second input connection connected to the output connection of said second shift pulse generating means, a first output connection coupled to said output buffer stage and a second output connection from one of said plurality of stages of said second storage register, said second storage register being operative in response to shift pulses at its second input connection to transfer data from said first storage means through said plurality of stages to said output buffer stage; and second indicator means having an input connection coupled to the second output connection of said second storage register and output connections coupled to said enabling means and to said sensing means, said second indicator means being operative in response to a predetermined signal at its input connection to generate a predetermined signal at its output connection indicating that said second storage register has a predetermined number of bits stored therein.

Claim 13

Apparatus according to claim 10 wherein said shifting means includes: a low frequency clock source operative to generate a low frequency clock signal; and a counter having a predetermined number of stages, each of said stages having an input connection coupled to said sensing means and adapted to receive a preset signal, said counter being operative to divide the low frequency clock signal by a predetermined number determined by said preset signal to thereby determine the rate of the data being transferred from said output buffer to said output terminal.

Claim 14

Apparatus according to claim 11 wherein said sensing means includes: means for counting bits per character having an input connection coupled to said shifting means and an output connection and being operative to generate a signal at its output connection when a predetermined bit of a character tO be transmitted is in said output buffer stage; and code generating means having input connections coupled to said means for counting, said first storage means and said output storage means and an output connection coupled to said shifting means and being operative in response to the presence or absence of data in said first storage means and in said output storage means when the signal is generated at the output connection of said means for counting to generate said coded signal at its output connection.

Claim 15

Apparatus according to claim 12 wherein said means for counting bits per character includes: decoder means having a predetermined number stored therein; and counter circuit having a first input connection coupled to said shifting means and an output connection coupled to said code generating means and being operative in response to a shifting signal at its first input connection to advance the count in steps from said predetermined number of said decoder means and to generate an output signal at the output connection of said counter circuit when the count reaches a second predetermined number.

Claim 16

Apparatus according to claim 13 wherein said code generating means includes: fourth gating means having input connections from said first storage means, said output storage means and said means for counting bits per character and an output connection and being operative in response to signals at its input connection indicating the presence of data in said first storage means and said output storage means coincident with the signal from said means for counting bits per character to generate a first signal condition and being operative in response to the absence of data in said output storage means and the presence of data in said first storage means and coincident with the signal from said means for counting bits per character to generate a second signal condition; and up/down counter means having an input connection coupled to said fourth gating means and an output connection coupled to the input connection of said shifting means and being operative to generate a first coded signal at its output connection indicating the second signal condition of said fourth gating means and to change the coded signal in a predetermined manner in response to the first signal condition generated by said fourth gating means.