US3781472A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Digital data ciphering technique
Assignee: Datotek Inc
•
Filing: 1971-04-15
•
Granted: 1973-12-25
•
Expires: 1991-04-15
Abstract
Abstract The specification discloses a ciphering system for providing security to digital transmission. To encode with the system, a clear text signal is clocked through a binary counter for a number of steps determined by a limit signal derived by a pseudorandom digital signal. To prevent transmission of clear text in case of a malfunction of the system, the clear text is compared with the ciphered output text and an alarm indication is generated upon correspondence of the clear text and the ciphered text for a predetermined number of digital bits. The alarm circuitry is checked and is required to be operative before the ciphering system may be operated. Speed trap circuitry prevents the system from being operated above a preselected frequency to reduce the possibility of breakdown of the system code by high speed analyzation procedures.
Inventors
- 👤 K Branscome
- 👤 G Goode
- 👤 B Morgan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 06:48
CPC Classifications
H; H04; H04L; H04L9/00; H04L9/06; H04L9/0618; H04L9/0637; H04L9/065; H04L9/0656; H04L9/0662; H04L9/0668; H04L9/12
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
86 words
A code system comprising: means for receiving a first digital word, means for generating a randomized digital signal, means for generating a limit signal in response to said randomized digital signal, and a nonlinear cyclic sequential stepping circuit for receiving said first digital word and for clocking said word a number of steps determined by said limit signal to generate a second digital word, wherein said second digital word is not defined by a linear recurrence function to thereby enhance the security of the code system.
Claim 2
Dependent Claim
86 words
A code system comprising: means for receiving a first digital word, means for generating a randomized digital signal, means for generating a limit signal in response to said randomized digital signal, and a nonlinear cyclic sequential stepping circuit for receiving said first digital word and for clocking said word a number of steps determined by said limit signal to generate a second digital word, wherein said second digital word is not defined by a linear recurrence function to thereby enhance the security of the code system.
Claim 3
Dependent Claim
22 words
The code system of claim 1 wherein said first digital word comprises clear text and said second digital word comprises enciphered text.
Claim 4
Dependent Claim
22 words
The code system of claim 1 wherein said first digital word comprises enciphered text and said second digital word comprises clear text.
Claim 5
Dependent Claim
29 words
The code system of claim 1 and further comprising: an alarm circuit for generating an alarm indication when said first and second digital words correspond over a predetermined interval.
Claim 6
Dependent Claim
26 words
The code system of claim 4 and further comprising: means for preventing operation of said code system until the operation of said alarm circuit is checked.
Claim 7
Dependent Claim
49 words
The code system of claim 1 and further comprising: means for inhibiting generation of said randomized digital signal when said code system is operated at a rate above a predetermined clock rate, to thereby prevent unauthorized breakdown of said code system with the use of high speed analyzation systems.
Claim 8
Dependent Claim
24 words
The code system of claim 1 and further comprising: means responsive to predetermined digital words to initiate or inhibit enciphering operation of said system.
Claim 9
Dependent Claim
20 words
The code System of claim 1 and further comprising: means for preventing the generation of a predetermined forbidden digital word.
Claim 10
Dependent Claim
16 words
The code system of claim 1 wherein said nonlinear stepping circuit comprises a synchronous binary counter.
Claim 11
Dependent Claim
85 words
An enciphering system comprising: means for enciphering clear text digital signals into cipher text digital signals, means for comparing said clear text digital signals with said cipher text digital signals, means for generating an alarm indication upon correspondence of said clear text and cipher text for a predetermined number of signals, circuitry for selectively initiating the operation of said enciphering means, and means for inhibiting said initiating circuitry until said alarm indication is generated in order to check the operation of said alarm generation means.
Claim 12
Dependent Claim
85 words
An enciphering system comprising: means for enciphering clear text digital signals into cipher text digital signals, means for comparing said clear text digital signals with said cipher text digital signals, means for generating an alarm indication upon correspondence of said clear text and cipher text for a predetermined number of signals, circuitry for selectively initiating the operation of said enciphering means, and means for inhibiting said initiating circuitry until said alarm indication is generated in order to check the operation of said alarm generation means.
Claim 13
Dependent Claim
14 words
The enciphering system of claim 10 wherein said generating means includes means for counting.
Claim 14
Dependent Claim
34 words
The enciphering system of claim 10 wherein said inhibiting means comprises circuitry for forcing said clear text and cipher text digital signals into correspondence for a predetermined interval after actuation of said initiating means.
Claim 15
Dependent Claim
96 words
A cipher system having breakdown prevention circuitry comprising: synchronizer means for generating clock signals, said synchronizer means generating a periodic shift signal for shifting between each digital signal and further generating a request for key signal in synchronism with said shift signal during a data word, a monostable circuit responsive to said shift signal for gating said request for key signal, means operable in synchronism with said clock signals for ciphering digital signals, and circuitry for inhibiting the operation of said ciphering means when the frequency of said clock signals is increased beyond a predetermined magnitude.
Claim 16
Dependent Claim
96 words
A cipher system having breakdown prevention circuitry comprising: synchronizer means for generating clock signals, said synchronizer means generating a periodic shift signal for shifting between each digital signal and further generating a request for key signal in synchronism with said shift signal during a data word, a monostable circuit responsive to said shift signal for gating said request for key signal, means operable in synchronism with said clock signals for ciphering digital signals, and circuitry for inhibiting the operation of said ciphering means when the frequency of said clock signals is increased beyond a predetermined magnitude.
Claim 17
Dependent Claim
152 words
A cipher system comprising: encoding means for receiving a clear text digital word, means for generating a first random digital signal, a first nonlinear cyclic sequential stepping circuit for receiving said clear text word and for cycling said word for a number of steps determined by said random digital signal, means for detecting the output of said nonlinear stepping circuit and for stepping said nonlinear stepping circuit an additional step upon the detection of a predetermined forbidden word, decoding means for receiving the output of said first nonlinear cyclic sequential stepping circuit, means for generating a second random digital signal corresponding to said first random digital signal, and a second nonlinear cyclic sequential stepping circuit operable to receive a ciphered text digital word from said decoding means and for cycling said word for a number of steps determined by said second random digital signal to thereby generate said clear text digital word.
Claim 18
Dependent Claim
152 words
A cipher system comprising: encoding means for receiving a clear text digital word, means for generating a first random digital signal, a first nonlinear cyclic sequential stepping circuit for receiving said clear text word and for cycling said word for a number of steps determined by said random digital signal, means for detecting the output of said nonlinear stepping circuit and for stepping said nonlinear stepping circuit an additional step upon the detection of a predetermined forbidden word, decoding means for receiving the output of said first nonlinear cyclic sequential stepping circuit, means for generating a second random digital signal corresponding to said first random digital signal, and a second nonlinear cyclic sequential stepping circuit operable to receive a ciphered text digital word from said decoding means and for cycling said word for a number of steps determined by said second random digital signal to thereby generate said clear text digital word.
Claim 19
Dependent Claim
20 words
The cipher system of claim 14 wherein said first and second nonlinear cyclic sequential stepping circuit comprise a binary counter.
Claim 20
Independent Claim
82 words
The method of generating ciphered data comprising: enciphering clear text digital bits into cipher text digital bits, comparing said clear text digital bits with said cipher text digital bits, generating an alarm indication upon correspondence of said clear text and cipher text for a predetermined number of bits, forcing the generation of said alarm indication upon initial enciphering operations, and inhibiting the generation of cipher text until said alarm indication is generated in order to check the operation of the alarm indication.
Claim 21
Independent Claim
82 words
The method of generating ciphered data comprising: enciphering clear text digital bits into cipher text digital bits, comparing said clear text digital bits with said cipher text digital bits, generating an alarm indication upon correspondence of said clear text and cipher text for a predetermined number of bits, forcing the generation of said alarm indication upon initial enciphering operations, and inhibiting the generation of cipher text until said alarm indication is generated in order to check the operation of the alarm indication.
Claim 22
Independent Claim
62 words
The method of preventing unauthorized breakdown of generated ciphered data comprising: generating clock signals, generating a periodic shift signal and a request for key signal, gating said request for key signal with said shift signal, ciphering digital signals in synchronism with said clock signals, and inhibiting said ciphering operation when the frequency of said clock signals is increased beyond a predetermined magnitude.
Claim 23
Independent Claim
62 words
The method of preventing unauthorized breakdown of generated ciphered data comprising: generating clock signals, generating a periodic shift signal and a request for key signal, gating said request for key signal with said shift signal, ciphering digital signals in synchronism with said clock signals, and inhibiting said ciphering operation when the frequency of said clock signals is increased beyond a predetermined magnitude.
Claim 24
Independent Claim
64 words
The method of ciphering comprising: generating a pseudorandom digital signal, cycling a clear text digital word through a nonlinear cyclic sequential stepping circuit for a number of steps determined by said pseudorandom digital signal, monitoring the output of the stepping circuit, and cycling said stepping circuit an additional step upon the detection of a predetermined digital word at the output of the stepping circuit.
Claim 25
Independent Claim
64 words
The method of ciphering comprising: generating a pseudorandom digital signal, cycling a clear text digital word through a nonlinear cyclic sequential stepping circuit for a number of steps determined by said pseudorandom digital signal, monitoring the output of the stepping circuit, and cycling said stepping circuit an additional step upon the detection of a predetermined digital word at the output of the stepping circuit.
Claim 26
Dependent Claim
57 words
The method of claim 18 wherein said clear text digital word is generated from a teleprinter system, and further comprising: when said clear text digital word comprises the teleprinter FIGURES word, transforming said FIGURES word into a LINE FEED digital word, and cycling said LINE FEED digital word through said stepping circuit to encipher said digital word.
Claim 27
Dependent Claim
41 words
The method of claim 19 and further comprising: deciphering the enciphered digital word into a LINE FEED digital word, if the preceding digital word comprises a CARRIAGE RETURN digital word, transforming said LINE FEED digital word into a FIGURES digital word.
Claim 28
Dependent Claim
19 words
The method of claim 18 wherein said predetermined digital word comprises: teleprinter CARRIAGE RETURN, NULL, and FIGURES digital words.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-12-24 | 1977-06-25 | 1977-12-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-12-24 | 1981-06-25 | 1981-12-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-12-24 | 1985-06-25 | 1985-12-25 | $7700.00 | Window Closed / Lapsed |