US3802180A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Pulses generating system
Assignee: Societe Europeenne de Semi Conducteurs de Microelectronique SA SESCOSEM
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Filing: 1972-06-28
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Granted: 1974-04-09
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Expires: 1992-06-28
Abstract
Abstract Briefly stated, the system in accordance with an object of the present invention, is related to a system for generating finite pulses from signals derived from a selected stage of a frequency divider receiving high frequency signals from a master oscillator, said pulses providing a drive control for an electric stepping motor of an electronic watch. The pulses generating system comprises two logical storage means, e.g two toggles in a master-slave arrangement, synchronised by sync. signals derived from a medium order divider stage and controlled by signals derived from lower order divider stage imposing the repetition frequency to said generated control pulses. The system embodiment, to which an operation control system means may be added, is realizable according to microelectronic integrated circuit techniques.
Inventors
- 👤 J Boudry
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 05:44
CPC Classifications
G; G04; G04C; G04C3/00; G04C3/14
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
356 words
A pulse generating system provided for the drive control of the electromagnetic part of an electric watch, said watch comprising a master oscillator, an electronic frequency divider connected to said oscillator and including a plurality of dividing stages of higher order, of medium order, and lower order, an electric motor of the stepping operation type controlled by pulses having a finite duration and repetition frequency and a D.C. power supply connected to said motor and wherein said pulse generating system comprises at least two logical system means for storing binary data, the first of said means comprising a control input terminal connected to the output of a frequency divider stage of said lower order for determining the repetition frequency of said pulses, a clock input terminal of said first means connected to an output of said medium order divider stage by a connecting means which allows the modification of the connection of one of said medium order stage for determining the duration of said pulse, said first means having at least two outputs, one of said first means outputs being a logical signal X output terminal and the other of said output terminals being a logical complementary signal X output terminal, and said second logical system means comprising at least first and second control inputs connected respectively to X and X of said first means output terminals, a clock input terminal connected directly through an inverter means to said first means clock input terminal connection and said second means having two outputs, one logical signal Y output and one logical complementary signal Y; and wherein said pulse generating system in addition comprises decoding means including a logical arrangement comprising two AND gates having inputs connected to said logical outputs of said two logical system means, one of said gates receiving logical signals X and Y and the other of said gates receiving logical signals X and Y, the pulse generating system thereby providing two pulse trains of the same pulse duration and the same repetition frequency but offset in time, said decoding means being connected to said motor for coupling said two generated pulse trains thereto.
Claim 2
Dependent Claim
356 words
A pulse generating system provided for the drive control of the electromagnetic part of an electric watch, said watch comprising a master oscillator, an electronic frequency divider connected to said oscillator and including a plurality of dividing stages of higher order, of medium order, and lower order, an electric motor of the stepping operation type controlled by pulses having a finite duration and repetition frequency and a D.C. power supply connected to said motor and wherein said pulse generating system comprises at least two logical system means for storing binary data, the first of said means comprising a control input terminal connected to the output of a frequency divider stage of said lower order for determining the repetition frequency of said pulses, a clock input terminal of said first means connected to an output of said medium order divider stage by a connecting means which allows the modification of the connection of one of said medium order stage for determining the duration of said pulse, said first means having at least two outputs, one of said first means outputs being a logical signal X output terminal and the other of said output terminals being a logical complementary signal X output terminal, and said second logical system means comprising at least first and second control inputs connected respectively to X and X of said first means output terminals, a clock input terminal connected directly through an inverter means to said first means clock input terminal connection and said second means having two outputs, one logical signal Y output and one logical complementary signal Y; and wherein said pulse generating system in addition comprises decoding means including a logical arrangement comprising two AND gates having inputs connected to said logical outputs of said two logical system means, one of said gates receiving logical signals X and Y and the other of said gates receiving logical signals X and Y, the pulse generating system thereby providing two pulse trains of the same pulse duration and the same repetition frequency but offset in time, said decoding means being connected to said motor for coupling said two generated pulse trains thereto.
Claim 3
Dependent Claim
27 words
The system according to claim 1, wherein said two logical storing system means are bistable toggles of said ''''D'''' type or, in other words, a ''''master-slave'''' arrangement.
Claim 4
Dependent Claim
15 words
The system according to claim 1, wherein the system is in an integrated circuit embodiment.
Claim 5
Dependent Claim
41 words
The system according to claim 1, wherein said connecting means is a busbar connected by soldering means to an output terminal of said medium order divider stage and to said first and second clock inputs of the two logical system means.
Claim 6
Dependent Claim
113 words
The system according to claim 1, wherein the system comprises, connected to the control input terminal of said first logical system means, an operation control system comprising an AND gate for inhibiting control pulse transmission and actuated by switching means and an arrangement of a second AND gate connected to the uPper stages of the lower frequency divider stages and a third AND gate connected to the lower stages of the low frequency divider stages, said both last mentioned gates being actuated by another switching means, said last mentioned gates being connected to the first gate by means of and OR gate thereby enabling modification of the repetition rate of said control pulses.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-04-08 | 1977-10-08 | 1978-04-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-04-08 | 1981-10-08 | 1982-04-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-04-08 | 1985-10-08 | 1986-04-09 | $7700.00 | Window Closed / Lapsed |