US3823359A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Inhibit and reset circuit
Assignee: NCR Voyix Corp
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Filing: 1973-03-07
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Granted: 1974-07-09
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Expires: 1993-03-07
Abstract
Abstract The circuit of the present invention is used in conjunction with a peripheral machine power supply to control the connection of the peripheral machine to the trunk line of a computer processing unit such that the peripheral machine does not load the trunk line unnaturally during power ''''on'''' and ''''off'''' transitions. Means are provided for sensing the AC power supplied to the peripheral machine and for providing a signal indicative of the presence or absence of AC power. A delay means receives the provided signal and delays the provided signal for a period of time sufficient to allow the peripheral machine''s power supply to reach operating level and for a minimal time in anticipation of the machine''s power supply dropping out of its operating level. Means responsive to the delayed signal connects or disconnects the peripheral machine from the trunk line when power operating levels are reached or not reached, respectively.
Inventors
- 👤 C Koeller
- 👤 S Chan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 23:39
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/26
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
261 words
An inhibit and reset circuit for effectively connecting and disconnecting a peripheral machine from the trunk line of a computer processing unit when the peripheral machine unnaturally loads the trunk line, comprising in combination: a. a peripheral machine power supply means for converting applied AC power into DC power; b. means for sensing the applied AC power and for providing a sense signal, the level of which is indicative of the presence or absence of the applied AC power; c. delay means for receiving said sense signal and for delaying the rise time of said sense signal for a selected period of time; d. switch means responsive to said sense signal connected to said delay means for removing the delayed portion of said sense signal in the absence of AC power; e. amplifier means for receiving and amplifying an impedance isolated sense signal; f. buffer means for receiving the sense signal from said delay means and transmitting said signal to the amplifier means, and for providing impedance isolation between said switch means and said amplifier means; g. switching means for receiving the amplified sense signal from said amplifier means and for connecting and disconnecting said peripheral machine to said trunk line in response to the level of the amplified sense signal, so as to connect said peripheral machine to said trUnk line after AC power is applied to the peripheral machine power supply means for said selected period of time and to disconnect said peripheral machine from said trunk line immediately after AC power is removed from said power supply means.
Claim 2
Dependent Claim
261 words
An inhibit and reset circuit for effectively connecting and disconnecting a peripheral machine from the trunk line of a computer processing unit when the peripheral machine unnaturally loads the trunk line, comprising in combination: a. a peripheral machine power supply means for converting applied AC power into DC power; b. means for sensing the applied AC power and for providing a sense signal, the level of which is indicative of the presence or absence of the applied AC power; c. delay means for receiving said sense signal and for delaying the rise time of said sense signal for a selected period of time; d. switch means responsive to said sense signal connected to said delay means for removing the delayed portion of said sense signal in the absence of AC power; e. amplifier means for receiving and amplifying an impedance isolated sense signal; f. buffer means for receiving the sense signal from said delay means and transmitting said signal to the amplifier means, and for providing impedance isolation between said switch means and said amplifier means; g. switching means for receiving the amplified sense signal from said amplifier means and for connecting and disconnecting said peripheral machine to said trunk line in response to the level of the amplified sense signal, so as to connect said peripheral machine to said trUnk line after AC power is applied to the peripheral machine power supply means for said selected period of time and to disconnect said peripheral machine from said trunk line immediately after AC power is removed from said power supply means.
Claim 3
Dependent Claim
32 words
The inhibit and reset circuit according to claim 1 wherein said amplifier and switching means are connected to receive DC power from said peripheral machine power supply and from said trunk line.
Claim 4
Dependent Claim
52 words
The inhibit and reset circuit according to claim 1 wherein said delay means is comprised of a resistor and a capacitor connected in series between said sensing means and a reference potential point, said sense signal being fed to said buffer means from the juncture point of said resistor and said capacitor.
Claim 5
Dependent Claim
34 words
The inhibit and reset circuit according to claim 1 wherein said switch means is connected across said capacitor so as to discharge said capacitor when said sense signal indicates an absence of AC power.
Claim 6
Dependent Claim
19 words
The inhibit and reset circuit according to claim 1 wherein said buffer means is a Darlington emitter follower stage.
Claim 7
Dependent Claim
203 words
An inhibit and reset circuit for effectively connecting and disconnecting a peripheral machine from the trunk line of a computer processing unit when the peripheral machine unnaturally loads the trunk line, comprising in combination: a. a peripheral power supply means for converting applied AC power into DC power; b. means for sensing the applied AC power and for providing a DC signal, when AC power is sensed; c. delay means for receiving said DC signal and for delaying the rise time of said DC signal for a selected period of time; d. switch means responsive to said DC signal for terminating the delayed DC signal from said delay means; e. amplifier means for receiving and amplifying an impedance isolated delayed DC signal; f. buffer means for receiving said delayed DC signal and transmitting said signal to the amplifier means, and for providing impedance isolation between said switch means and said amplifier means; and g. means for receiving the amplified signal from said amplifier means and for connecting said peripheral machine to said trunk line in response to the amplified DC signal from said amplifier means, and for disconnecting said peripheral machine from said trunk line in the absence of an amplified DC signal
Claim 8
Dependent Claim
203 words
An inhibit and reset circuit for effectively connecting and disconnecting a peripheral machine from the trunk line of a computer processing unit when the peripheral machine unnaturally loads the trunk line, comprising in combination: a. a peripheral power supply means for converting applied AC power into DC power; b. means for sensing the applied AC power and for providing a DC signal, when AC power is sensed; c. delay means for receiving said DC signal and for delaying the rise time of said DC signal for a selected period of time; d. switch means responsive to said DC signal for terminating the delayed DC signal from said delay means; e. amplifier means for receiving and amplifying an impedance isolated delayed DC signal; f. buffer means for receiving said delayed DC signal and transmitting said signal to the amplifier means, and for providing impedance isolation between said switch means and said amplifier means; and g. means for receiving the amplified signal from said amplifier means and for connecting said peripheral machine to said trunk line in response to the amplified DC signal from said amplifier means, and for disconnecting said peripheral machine from said trunk line in the absence of an amplified DC signal
Claim 9
Dependent Claim
31 words
The inhibit and reset circuit according to claim 6 wherein said amplifier and switching means are connected to receive power from said peripheral machine''s power supply and from said trunk line.
Claim 10
Dependent Claim
53 words
The inhibit and reset circuit according to claim 6 wherein said delay means is comprised of a resistor and a capacitor connected in series between said means for sensing and a reference potential point, said DC signal being fed to said buffer means from the juncture point of said resistor and said capacitor.
Claim 11
Dependent Claim
34 words
The inhibit and reset circuit according to claim 6 wherein said switch means is connected across said capacitor so as to discharge said capacitor when said DC signal indicates an absence of AC power.
Claim 12
Dependent Claim
19 words
The inhibit and reset circuit according to claim 6 wherein said buffer means is a Darlington emitter follower stage.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-07-08 | 1978-01-07 | 1978-07-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-07-08 | 1982-01-07 | 1982-07-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-07-08 | 1986-01-07 | 1986-07-09 | $7700.00 | Window Closed / Lapsed |