Hybrid power system modules

Claim 2

A DC circuit for representing an electric power system load comprising a first circuit for generating at least one output current phasor signal corresponding to a first coordinate component of at least the bus to load current from the actual bus to which the load is connected, a second circuit for generating at least one other output current phasor signal corresponding to a second coordinate component of at least the bus to load current from the actual bus to which the load is connected, each of said first and second circuits having means for respectively receiving first and second scheduled input power signals corresponding to respective first and second coordinate components of the power scheduled to be drawn from the actual bus by the actual load and respective actual signals corresponding to respective first and second coordinate components of the actual power drawing from the actual bus by the actual load and means for respectively generating the first and second coordinate components of actual power having as inputs the output current phasor signals and voltage phasor signals corresponding to first and second coordinate components of the actual bus voltage each of said first and second circuits further including means for comprising its respectively associated scheduled and actual power signals and for integrating the result to generate the output current phasor signal associated therewith.

Claim 3

A DC circuit as set forth in claim 1 wherein amplifiers are employed to provide the comparison and integration functions in each of said first and second circuits

Claim 4

A DC circuit as set forth in claim 1 wherein separate amplifiers are employed to provide the comparison and integration junctions in each of said first and second circuits.

Claim 5

A DC circuit as set forth in claim 1 wherein said means for respectively generating said first and second coordinate components of actual power each include first and second circuits for multiplication and a circuit for comparing said circuits for multplication having at least first and second inputs and at least one output which is the product of the first and second inputs, said circuits for comparing having at least first and second inputs connected to the outputs of associated circuits for multiplication and an output which is the associated corresponding coordinate component of actual power, one of the circuits for multiplication associated with the first coordinate component of actual power having as its first and second inputs the current phasor signal corresponding to the first coordinate component of bus to load current and a voltage phasor signal corresponding to the associated first coordinate component of voltage at the actual bus, the other circuit for multiplication having as first and second inputs to current phasor signal corresponding to the second coordinate component of bus to load current and a voltage phasor signal corresponding to an associated second coordinate component of the voltage at the actual bus, one of the circuits for multiplication associated with the second coordinate component of actual power having first and second inputs the current phasor signal corresponding to the first coordinate component of bus to load current and a voltage phasor signal corresponding to the second coordinate component of voltage at the actual bus, the other circuit for multiplication having as first and second inputs the current phasor signal corresponding to the second coordinate component of bus to load current and a voltage phasor signal corresponding to the negative of said first coordinate component of the voltage at the actual bus.

Claim 6

A DC circuit as set forth in claim 4 wherein amplifiers are employed as the comparator circuits in each of said means for respectively generating said first and second coordinate components of actual power.

Claim 7

A DC circuit as set forth in claim 1 wherein said first and second circuits for generating output current phasor signals operate with signals representative of real and imaginary currents, voltages and power in X and Y coordinates.

Claim 8

A DC circuit as set forth in claim 1 wherein said first and second circuits for generating output current phasor signals operate with signals representative of real and imaginary currents, voltages and powers in X and Y coordinates, said receiving means of said first circuit provided to receive real input power signals said receiving means of said second circuit provided to receive imaginary input power signals, and said first and second circuits respectively generating real and imaginary output current phasor signals.

Claim 9

A DC circuit for representing an electric power system load comprising a first circuit which includes means for generating an actual power signal, PPL, corresponding to the sum Epr IPLr + EPLi, a second circuit which includes means for generating an actual power signal, QPL, corresponding to the difference Epi Ipr - Epr Ipi, where Epr, Epi, Ipr and Ipi correspond to bus voltage and bus to load current phasor signals and are inputs to each of said means for generating actual power signals and Ipr and Ipi are first and second circuit outputs, respectively generated through integration of the comparison between PPSL and PPL and the comparison between QPSL and QPL, where PPSL and QPSL are scheduled power input signals to receiving means of said circuits, PPL and QPL also respectively input to corresponding receiving means.

Claim 10

A DC circuit for representing an electric power system load comprising a first circuit which includes means for generating an actual power signal, PPL, corresponding to the sum Epr IPLr + EPLi, a second circuit which includes means for generating an actual power signal, QPL, corresponding to the difference Epi Ipr - Epr Ipi, where Epr, Epi, Ipr and Ipi correspond to bus voltage and bus to load current phasor signals and are inputs to each of said means for generating actual power signals and Ipr and Ipi are first and second circuit outputs, respectively generated through integration of the comparison between PPSL and PPL and the comparison between QPSL and QPL, where PPSL and QPSL are scheduled power input signals to receiving means of said circuits, PPL and QPL also respectively input to corresponding receiving means.

Claim 11

A DC circuit as set forth in claim 8, wherein each of said first and second circuits includes amplifiers for the comparison and integration functions in each of said circuits.

Claim 12

A DC circuit for representing an electric power system generator comprising a first circuit for generating at least one output current phasor signal corresponding to a first coordinate component of at least the generation current for the actual bus to which the generator is connected, a second circuit for generating at least one other output current phasor signal corresponding to a second coordinate component of at least the generation current for the actual bus to which the generator is connected, said first circuit having means for receiving a scheduled input power signal corresponding to a first coordinate component of the power scheduled to be supplied to the actual bus by the actual generator and an actual input power signal corresponding to a first coordinate component of the actual power supplied to the actual bus by the actual generator, means for generating said first coordinating component of actual power having as inputs the output current phasor signals and first and second voltage phasor signals corresponding to first and second coordinate components of actual bus voltage, and means for comparing the scheduled and actual power signals and for integrating the result to generate the first coordinate component output current phasor signal, said second circuit having means for receiving first and second voltage phasor signals corresponding tO first and second coordinate components of actual bus voltage, means for generating the squares of each of said first and second coordinate components of actual bus voltage and means for comparing an input signal corresponding to the square of the magnitude of a scheduled voltage at the actual bus to the sum of the squares of said first and second coordinate components of actual bus voltage and for integrating result to generate the second coordinate component output current phasor signal.

Claim 13

A DC circuit for representing an electric power system generator comprising a first circuit for generating at least one output current phasor signal corresponding to a first coordinate component of at least the generation current for the actual bus to which the generator is connected, a second circuit for generating at least one other output current phasor signal corresponding to a second coordinate component of at least the generation current for the actual bus to which the generator is connected, said first circuit having means for receiving a scheduled input power signal corresponding to a first coordinate component of the power scheduled to be supplied to the actual bus by the actual generator and an actual input power signal corresponding to a first coordinate component of the actual power supplied to the actual bus by the actual generator, means for generating said first coordinating component of actual power having as inputs the output current phasor signals and first and second voltage phasor signals corresponding to first and second coordinate components of actual bus voltage, and means for comparing the scheduled and actual power signals and for integrating the result to generate the first coordinate component output current phasor signal, said second circuit having means for receiving first and second voltage phasor signals corresponding tO first and second coordinate components of actual bus voltage, means for generating the squares of each of said first and second coordinate components of actual bus voltage and means for comparing an input signal corresponding to the square of the magnitude of a scheduled voltage at the actual bus to the sum of the squares of said first and second coordinate components of actual bus voltage and for integrating result to generate the second coordinate component output current phasor signal.

Claim 14

A DC circuit as set forth in claim 10 wherein amplifiers are employed to provide the comparison and integration functions in each of said first and second circuits.

Claim 15

A DC circuit as set forth in claim 10 wherein separate amplifiers are employed to provide the comparison and integration functions in each of said first and second circuits.

Claim 16

A DC circuit as set forth in claim 10 wherein said means for generating said first coordinate component of actual power includes first and second multiplier circuits and a comparator circuit, each of said multiplier circuits having at least first and second inputs and an output which is the product of said first and second inputs said comparator circuit having at least first and second inputs connected to said outputs of said multiplier circuits and an output which is the first coordinate component of actual power, the inputs of the first multiplier circuit being the output current phasor signal corresponding to the first coordinate component of generation current and a voltage phasor signal corresponding to the first coordinate component of actual bus voltage, the second multiplier circuit having as its inputs the output current phasor signal corresponding the the second coordinate component of generation current and a voltage phasor signal corresponding to the second coordinate component of actual bus voltage.

Claim 17

A DC circuit as set forth in claim 10 wherein said means for generating the squares of each of said first and said second coordinate components of actual bus voltage includes a first and a second circuit for multiplication each having first and second inputs and an output, said first and said second inputs of said first circuit for multiplication each being the voltage phasor signal corresponding to the first coordinate component of actual bus voltage, said first and second inputs of said second circuit for multiplication each being the voltage phasor signal corresponding to the second coordinate component of actual bus voltage, said outputs of said circuits for multiplication being the squares of the first and second coordinate components of actual bus voltage, respectively.

Claim 18

A DC circuit as set forth in claim 10 wherein said first and second circuits operate with signals representative of real and imaginary current, voltages, and powers in X and Y coordinates.

Claim 19

A DC circuit as set forth in claim 10 wherein said first and second circuits for generating output current phasor signals operate with signals representative of real and imaginary currents, voltages and powers in X and Y coordinates said receiving means of said first circuit provided to receive real input power signals, said receiving means of said second circuit provided to receive real and imaginary input voltage phasor signals, and said first and second circuits respectively generating real and imaginary output current phasor signals.

Claim 20

A DC circuit for representing an electric power system generator comprising a first circuit which includes means for generating an actual power signal, PP corresponding to the sum Epr Ipr + Epi Ipi, a second circuit which includes means for generating the square of actual bus voltage signal Ep2 (Epr)2 + (Epi)2, where Epr Epi, Ip2 and Ipi correspond to bus voltage and generator current phasor signals and are inputs to said means For generating the power signal, Pp, and Epr and Epi are also inputs to said means for generating the square of actual bus voltage, Ep2 and Ipr and Ipi are first and second circuit outputs, respectively generated through integrating of the comparison between PPS and the comparison between EPS2 and Ep2, where PPS is a scheduled power input to a receiving means of said first circuit, PP also input to said receiving means, and EPS2 is a scheduled square of actual bus voltage input to a comparator means in said second circuit, Ep2 also input to said comparator means.

Claim 21

A DC circuit for representing an electric power system generator comprising a first circuit which includes means for generating an actual power signal, PP corresponding to the sum Epr Ipr + Epi Ipi, a second circuit which includes means for generating the square of actual bus voltage signal Ep2 (Epr)2 + (Epi)2, where Epr Epi, Ip2 and Ipi correspond to bus voltage and generator current phasor signals and are inputs to said means For generating the power signal, Pp, and Epr and Epi are also inputs to said means for generating the square of actual bus voltage, Ep2 and Ipr and Ipi are first and second circuit outputs, respectively generated through integrating of the comparison between PPS and the comparison between EPS2 and Ep2, where PPS is a scheduled power input to a receiving means of said first circuit, PP also input to said receiving means, and EPS2 is a scheduled square of actual bus voltage input to a comparator means in said second circuit, Ep2 also input to said comparator means.

Claim 22

A DC circuit as set forth in claim 17 wherein amplifier means are employed to provide comparison and integration functions in each of said first and second circuits.