US3836908A
Expired / Lapsed
US
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Digital to analog converter
Assignee: Grundig EMV Elektromechanische Versuchsanstalt Max Grundig GmbH
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Filing: 1973-12-19
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Granted: 1974-09-17
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Expires: 1993-12-19
Abstract
Abstract An arrangement for converting digital signal to analog signals comprising a comparator, a comparison digit generator and an input digit generator. The ordered inputs and outputs of the comparator and the comparison digit generator, respectively, are connected in a predetermined permuted manner.
Inventors
- 👤 M Hegendorfer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 05:51
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/66; H03M1/82
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
133 words
An arrangement for converting digital signals to analog signals comprising, in combination, a comparator, comprising a plurality of ordered first inputs with first signals thereon, a plurality of ordered second inputs with second signals thereon, and an output, wherein the first signals on the said ordered first inputs are compared with the second signals on the said ordered second inputs, to determine a functional relationship between said first and second signals, and reflecting said relationship as an output signal on said output; a comparison digit generator, comprising a plurality of ordered outputs which are respectively connected to predetermined permuted order first inputs of said ordered first inputs of said comparator and an input digit generator, comprising a plurality of ordered outputs connected respectively to the said ordered second inputs of the said comparator.
Claim 2
Dependent Claim
133 words
An arrangement for converting digital signals to analog signals comprising, in combination, a comparator, comprising a plurality of ordered first inputs with first signals thereon, a plurality of ordered second inputs with second signals thereon, and an output, wherein the first signals on the said ordered first inputs are compared with the second signals on the said ordered second inputs, to determine a functional relationship between said first and second signals, and reflecting said relationship as an output signal on said output; a comparison digit generator, comprising a plurality of ordered outputs which are respectively connected to predetermined permuted order first inputs of said ordered first inputs of said comparator and an input digit generator, comprising a plurality of ordered outputs connected respectively to the said ordered second inputs of the said comparator.
Claim 3
Dependent Claim
30 words
An arrangement as defined in claim 1, further comprising an integrator having an input connected to the said output of said comparator, and having an output producing an analog signal.
Claim 4
Dependent Claim
22 words
An arrangement as defined in claim 1, wherein the plurality of ordered outputs of the comparison digit generator correspond to binary digits.
Claim 5
Dependent Claim
22 words
An arrangement as defined in claim 1, wherein the plurality of ordered outputs of the input digit generator corresponding to binary digits.
Claim 6
Dependent Claim
38 words
An arrangement as defined in claim 1, wherein the said functional relationship between the said first and second signals is that the number represented by the second signals is greater than the number represented by the first signals.
Claim 7
Dependent Claim
53 words
An arrangement as defined in claim 1, wherein the consequence of the satisfaction of the said functional relationship is to produce an output signal of unit mangitude on said output of said comparator, and the non-satisfaction of said functional relationship produces an output signal of zero magnitude on said output of said comparator.
Claim 8
Dependent Claim
26 words
An arrangement as defined in claim 3, wherein the said predetermined permuted order is a permutation of a predetermined number of the higher valued binary digits.
Claim 9
Dependent Claim
77 words
An arrangement as defined in claim 1, wherein the said predetermined permuted order is a permutation connecting the highest ordered output of the comparison digit generator with tHe lowest ordered first input of the comparator, the second highest ordered output of the comparison digit generator with the second lowest ordered first input of the comparator, and so on, to the lowest ordered output of the comparison digit generator with the highest ordered first input of the comparator.
Claim 10
Dependent Claim
29 words
An arrangement as defined in claim 1, wherein the said predetermined permuted order can be changed depending on the number corresponding to the output of the input digit generator.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-09-16 | 1978-03-18 | 1978-09-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-09-16 | 1982-03-18 | 1982-09-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-09-16 | 1986-03-18 | 1986-09-17 | $7700.00 | Window Closed / Lapsed |