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US3842207A Expired / Lapsed US ⏱️ 0.0 years remaining

Data set control logic

Assignee: MI Inc
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Filing: 1973-02-27
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Granted: 1974-10-15
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Expires: 1993-02-27
📄 Original PDF 🌐 Google Patents

Abstract

Abstract A control logic circuit for a modem of the type connected to a direct access arrangement terminal unit. The modem has automatic answer, manual answer, originate, clear, local, voice and test modes. An abort timer has two alternative timing cycles, one for originate and the second for answer. The data set logic automatically interfaces to CBS or CBT systems and also automatically selected and operates in connection with two direct access arrangement terminal units.

Inventors

  • 👤 R Fretwell

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 05:59
CPC Classifications
H; H04; H04M; H04M11/00; H04M11/06

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 353 words
A control logic circuit for a modem of the type connected to a direct access arrangement including RI, DT, DR, DA and OH terminals, the modem having a modulator, a demodulator and a carrier detector for shifting from a first to a second output level when a carrier is received, the logic circuit comprising: a. an originate latching means having a first output level for an originate state and a second output level for an answer state, the originate latching means having a set input connected to a manual switch for switching to the originate state, and a reset input for switching to the answer state; b. a ring detector means having its input connected to said RI terminal and having an output for shifting from a first to second ring-indicating level in response to a ring signal input; c. an abort timer means having originate and answer timing cycles and an output which shifts from a first on hook level to a second off hook level during a timing cycle, the abort timer means having a first input connected to the output of said ring detector for initiating an answer timing cycle in response to a ring signal, the abort timer emans also having a second input connected to said output of said originate latching means for initiating said originate timing cycle when said originate latching means switches to its said originate state, said abort timer means further having a reset input connected to said carrier detector for resetting said timer means in response to the receipt of a carrier; d. an OH driver means connected to the output of said abort timer means for generating an off hook output condition during a timing cycle, said driver means having an output connected to said OH terminal and to said reset input of said originate latching means for resetting said originate latching means in response to a transition from an off-hook state to an on hook state, the driver means also having an input terminal connected to said carrier detector for generating said off hook output condition when a carrier is being received.
Claim 2
Dependent Claim 353 words
A control logic circuit for a modem of the type connected to a direct access arrangement including RI, DT, DR, DA and OH terminals, the modem having a modulator, a demodulator and a carrier detector for shifting from a first to a second output level when a carrier is received, the logic circuit comprising: a. an originate latching means having a first output level for an originate state and a second output level for an answer state, the originate latching means having a set input connected to a manual switch for switching to the originate state, and a reset input for switching to the answer state; b. a ring detector means having its input connected to said RI terminal and having an output for shifting from a first to second ring-indicating level in response to a ring signal input; c. an abort timer means having originate and answer timing cycles and an output which shifts from a first on hook level to a second off hook level during a timing cycle, the abort timer means having a first input connected to the output of said ring detector for initiating an answer timing cycle in response to a ring signal, the abort timer emans also having a second input connected to said output of said originate latching means for initiating said originate timing cycle when said originate latching means switches to its said originate state, said abort timer means further having a reset input connected to said carrier detector for resetting said timer means in response to the receipt of a carrier; d. an OH driver means connected to the output of said abort timer means for generating an off hook output condition during a timing cycle, said driver means having an output connected to said OH terminal and to said reset input of said originate latching means for resetting said originate latching means in response to a transition from an off-hook state to an on hook state, the driver means also having an input terminal connected to said carrier detector for generating said off hook output condition when a carrier is being received.
Claim 3
Dependent Claim 73 words
A logic circuit according to claim 1 wherein said originate latching means is provided with a reset input for switching it to said answer state and wherein a manually operable answer switch is connected to said reset input and to said first input of said abort timer means for switching said originate latching means to its answer state and for initiating said answer timing cycle in response to operation of said answer switch.
Claim 4
Dependent Claim 103 words
A logic circuit according to claim 2 wherein a bistable clear latching means is provided having a first output level for a clear state and a second output level for a normal state, the latching means having a manually operable clear switch for switching the clear latching means to said clear state and having a reset input connected to said carrier detector for being reset to said normal state by the loss of a received carrier, the output of said clear latching means being connected to said reset input of said abort timer means for resetting said timer when in said clear state.
Claim 5
Dependent Claim 81 words
A circuit according to claim 3 wherein a space disconnect means is provided which includes a disconnect timer and an input connected to the output of said clear latching means for initiating a disconnect timing cycle in response to a clear state, the disconnect means having an output connected to said OH driver means for causing an on hook output to be generated by said driver means a selected time interval after said clear latching means switches to said clear state.
Claim 6
Dependent Claim 112 words
A circuit according to claim 3 wherein said circuit further comprises: a. a form feed logic means having a first set input connected to the output of said clear latching means and a second set input connected to the output of said carrier detector for being switches to an advance state in response to switching of said clear latching means to said clear state when a carrier is being received, response to the loss of a received carrier; and b. a print out advancing means connected to an output of said form feed logic means for advancing said advancing means when said form feed logic means is switched to said advance state.
Claim 7
Dependent Claim 189 words
A circuit according to claim 3 wherein said modem alternatively connectable to one of two DAA terminal units and wherein said circuit further comprises: a. a DAA switching means comprising a plurality of switches controlled by a single input for connecting the terminals on one DAA terminal unit to said modem in response to a first input state and for connecting the terminals of the other DAA unit to said modem in response to a second input state; b. a DAA selector having its output connected to said switching means input and having a set input connected to the RI terminal of one of said terminal units, a second input connected to the output of said OH driver means, and having a third manual input for connecting said modem to said one DAA terminal unit in response to a ring signal from said one unit in response to a first input condition at said manual selection input, for maintaining a modem connection in response to an off hook condition of said OH driver, and for connecting said modem to the other DAA terminal unit for all other input conditions.
Claim 8
Dependent Claim 142 words
A circuit according to claim 6 wherein said DAA selector comprises: a. a monostable flip-flop means having its output as the output of said DAA selector and having a set input; b. a first or gate having a pair of inputs and its output connected to said set input of said flip-flop means; c. a pair of and gates connected to the input of said first or gate, the inputs of one and gate connected to the output of said OH driver and to the output of said flip-flop means, one input of the other and gate being an inverting input and connected to said OH driver; d. a second or gate having its output connected to said other and gate, one input connected to the RI terminal of one DAA terminal unit and another input connected to a manual selector switch.
Claim 9
Dependent Claim 113 words
A circuit according to claim 3 wherein said circuit further comprises: a. a test latching means having a first output level for a test state and a second output level for a no-test state, said test latching means including a manually actuable test switch and a reset input connected to the output of said OH driver means for switching to a test state in response to the operation of said test switch and for being reset upon switching to an on hook state; and b. a test connector for connecting the output of said modem demodulator to the input of said modem modulator when said test latch means is in said test state.
Claim 10
Dependent Claim 190 words
A circuit according to claim 3 wherein said circuit further includes a restraint and break means for selectively inhibiting a tape reader and a keyboard and a data terminal, said restraint and break means comprising: a. a restraint detector connected to the modem demodulator for shifting from a first to a second output level in response to a restraint signal; b. a break detector connected to said demodulator for shifting from a first to a second output level in response to a break signal; c. an or gate having one input connected to the output of the restraint detector and another input connected to the output of the break detector; d. switch means controlled by said gate for inhibiting said tape reader in response to a restraint signal or break signal; and e. bistable means having a set input connected to the output of said break detector and a reset input connected to a manually actuable reset switch and an output connected to a keyboard inhibit means for inhibiting said keyboard in response to a break signal and for releasing said keyboard in response to actuation of said manual switch.
Claim 11
Dependent Claim 146 words
A circuit according to claim 3 wherein said circuit further comprises a low paper signalling means connected to a pair of contacts which close when the supply of printout paper for said data terminal is low, said signalling means comprising: a. a memory means having at least three states, said memory means having inputs for selecting said states, one of said inputs connected to said pair of contacts for being set to a first state when said paper is low and to a second state when said paper is not low; b. manual switch means connected to a memory means input for setting it to a third state; c. audible signalling means connected to the memory means for being energized when said memory means is in said first state; and d. signal light means for being energized when said memory means is in said third state.

References Cited (Backward Citations)

US3609241A Cited
US3524935A Cited
US3549809A Cited
US3527891A Cited
US3739338A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-10-14 1978-04-15 1978-10-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-10-14 1982-04-15 1982-10-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-10-14 1986-04-15 1986-10-15 $7700.00 Window Closed / Lapsed

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