US3843938A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Gated clock multivibrator
Assignee: United States Department of the Navy
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Filing: 1973-03-09
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Granted: 1974-10-22
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Expires: 1993-03-09
Abstract
Abstract An astable multivibrator in combination with a NOR gate comprising both a gated clock and a nonretriggerable one-shot multivibrator. The multivibrator has first and second NOR gates. The signal between the first and second NOR gates is transmitted to the input of an external NOR gate and the output from the external NOR gate is transmitted ot the input of the first NOR gate of the multivibrator. A modification of the invention includes gating means connected to the multivibrator and the input of the circuit making the circuit a retriggerable one-shot. multivibrator.
Inventors
- 👤 D Bergman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 03:38
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/027; H03K3/03; H03K3/033; Y; Y10; Y10S; Y10S331/00; Y10S331/03
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
209 words
A pulse generating circuit comprising: astable multivibrator including a first and second logic elements each having two inputs and a single output, said first logic element having its output electrically coupled to the two inputs of said second logic element; output terminal means electrically coupled to the output of said second logic element; first feedback network electrically coupled to feed an electrical signal from the output of said second logic element to an input of said first and second logic elements; third logic element having two inputs and a single output, said third logic element having its output electrically coupled to one of the inputs of said first logic element; an electronic gating means electrically coupled from said first feedback network to the input of said third logic element; input terminal means electrically coupled to one of the input terminals of said third logic element for receiving a pulse input signal; second feedback means electrically coupling the output signal of said first logic element to one of the inputs of said third element; whereby an input pulse of predetermined time duration at the input of the third logic element allows the astable multivibrator to generate output pulses of equal time duration during the time period of the input pulse.
Claim 2
Dependent Claim
209 words
A pulse generating circuit comprising: astable multivibrator including a first and second logic elements each having two inputs and a single output, said first logic element having its output electrically coupled to the two inputs of said second logic element; output terminal means electrically coupled to the output of said second logic element; first feedback network electrically coupled to feed an electrical signal from the output of said second logic element to an input of said first and second logic elements; third logic element having two inputs and a single output, said third logic element having its output electrically coupled to one of the inputs of said first logic element; an electronic gating means electrically coupled from said first feedback network to the input of said third logic element; input terminal means electrically coupled to one of the input terminals of said third logic element for receiving a pulse input signal; second feedback means electrically coupling the output signal of said first logic element to one of the inputs of said third element; whereby an input pulse of predetermined time duration at the input of the third logic element allows the astable multivibrator to generate output pulses of equal time duration during the time period of the input pulse.
Claim 3
Dependent Claim
11 words
The device of claim 1 wherein said elements are NOR gates.
Claim 4
Dependent Claim
16 words
The pulse generating circuit of claim 1 wherein said first feedback network comprises: a timing circuitry.
Claim 5
Dependent Claim
69 words
The device of claim 1 wherein said gating means comprises: a transistor, having a base, emitter and collector electrodes; said collector electrode of said transistor being electrically coupled to said first feedback network; said emitter electrode of said transistor being electrically coupled to circuit ground potential; and said base electrode of said transistor being coupled serially through resistor and capacitor elements to the input of said third logic element.
Claim 6
Dependent Claim
194 words
A pulse generating circuit comprising: astable multivibrator including a first and second logic element each having two inputs and a single output, said first logic element having its output electrically coupled to the two inputs of said second logic element; output terminal means electrically coupled to the output of said second logic element; first feedback network electrically coupled to feed an electrical signal from the output of said second logic element to one of inputs of said first and second logic elements; third logic element having two inputs and a single output, said third logic element having its output electrically coupled to one of the inputs of said first logic element; input terminal means electrically coupled to one of the input terminals of said third logic element for receiving a pulse input signal; second feedback means electrically coupling the output signal of said first logic element to one of the inputs of said third logic element; an inverter having its input coupled to said input terminal means and its output coupled to a switch; and a diode having an anode coupled to said first feedback network and having its cathode coupled to said switch.
Claim 7
Dependent Claim
194 words
A pulse generating circuit comprising: astable multivibrator including a first and second logic element each having two inputs and a single output, said first logic element having its output electrically coupled to the two inputs of said second logic element; output terminal means electrically coupled to the output of said second logic element; first feedback network electrically coupled to feed an electrical signal from the output of said second logic element to one of inputs of said first and second logic elements; third logic element having two inputs and a single output, said third logic element having its output electrically coupled to one of the inputs of said first logic element; input terminal means electrically coupled to one of the input terminals of said third logic element for receiving a pulse input signal; second feedback means electrically coupling the output signal of said first logic element to one of the inputs of said third logic element; an inverter having its input coupled to said input terminal means and its output coupled to a switch; and a diode having an anode coupled to said first feedback network and having its cathode coupled to said switch.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-10-21 | 1978-04-22 | 1978-10-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-10-21 | 1982-04-22 | 1982-10-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-10-21 | 1986-04-22 | 1986-10-22 | $7700.00 | Window Closed / Lapsed |