US3859638A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Non-volatile memory unit with automatic standby power supply
Assignee: Intersil Corp
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Filing: 1973-05-31
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Granted: 1975-01-07
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Expires: 1993-05-31
Abstract
Abstract An integrated circuit memory unit having an integral standby power supply actuated manually or automatically upon main power supply failure or disconnect to maintain all memory information for retrieval or use. A single integral memory unit and standby power supply effects memory retention despite main power disconnect.
Inventors
- 👤 Jr Alfred S Hume
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 18:38
CPC Classifications
G; G11; G11C; G11C5/00; G11C5/14; G11C5/141; H; H10; H10W; H10W42/00
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
121 words
An improved integrated circuit memory having interface circuitry connecting address and data in and data out terminals to a memory array with a power supply terminal connected to the interface circuitry and memory array and comprising a small battery connected to VCC of the memory array, a detector connected to the power supply terminal and detecting a reduction in power at said terminal below a predetermined level, and switching means operated by said detector for connecting said battery to a disable terminal and a read-write terminal of said memory array to minimize power consumption by said memory array whereby said battery maintains the integrity of information stored in said array during reduced or failure of power at said power supply terminal.
Claim 2
Dependent Claim
121 words
An improved integrated circuit memory having interface circuitry connecting address and data in and data out terminals to a memory array with a power supply terminal connected to the interface circuitry and memory array and comprising a small battery connected to VCC of the memory array, a detector connected to the power supply terminal and detecting a reduction in power at said terminal below a predetermined level, and switching means operated by said detector for connecting said battery to a disable terminal and a read-write terminal of said memory array to minimize power consumption by said memory array whereby said battery maintains the integrity of information stored in said array during reduced or failure of power at said power supply terminal.
Claim 3
Dependent Claim
34 words
The memory of claim 1 further defined by all of said elements being disposed upon or within a single planar semiconducting chip and contained within a single package except for terminals exposed for connection.
Claim 4
Dependent Claim
47 words
The memory of claim 1 further defined by a manually operable switch connected between said battery and said disable terminal and read-write terminal of the array for manual switching to maintain the integrity of stored information prior to intentional disconnection of the memory from a power supply.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-01-06 | 1978-07-08 | 1979-01-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-01-06 | 1982-07-08 | 1983-01-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-01-06 | 1986-07-08 | 1987-01-07 | $7700.00 | Window Closed / Lapsed |