US3861585A
Expired / Lapsed
US
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Device for carrying out arithmetical and logical operations
Assignee: IFP Energies nouvelles
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Filing: 1973-03-02
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Granted: 1975-01-21
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Expires: 1993-03-02
Abstract
Abstract A device for carrying out arithmetical and logical operations upon control of a microprogram. The device includes a plurality of registers for performing arithmetical operations, a decoder for decoding microinstructions issued from a microprogram, and control devices for controlling the utilization of the registers in accordance with decoded microinstructions for carrying out arithmetical and logical operations.
Inventors
- 👤 Pierre Courboulay
- 👤 Jacques Cretin
- 👤 Francois Anceau
- 👤 Claude Beauducel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 05:51
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/38; G06F7/48; G06F7/52; G06F7/523; G06F7/533; G06F7/5334; G06F7/5336; G06F7/5338; G06F17/00; G06F17/10; G06F17/14; G06F17/141; G06F17/142; G06F7/535; G06F7/57; G06F9/00; G06F9/06; G06F9/22; G06F9/226; G06F2207/00; G06F2207/535; G06F2207/5352; G06F7/499; G06F7/49905; G06F7/4991
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
293 words
A device for carrying out arithmetical and logical operations upon control of a microprogram comprising first, second and third registers, adapted to contain operands to be processed, consisting of a series of bits of increasing significance, one additional element for memorizing the least significant bit of the second register, means for simultaneously producing numbers respectively equal to the value of the operand contained in the first register, to its conjugated value, to twice the value of the operand, to the conjugated value of twice the value of the operand and to zero, means for adding two binary numbers, an assembly for decoding the two less significant bits of the second register and the bit contained in the additional element, means for shifting the numbers contained in the adding means and in the second register, means for transmitting these numbers, after shifting thereof, to the third register, the second register and to the additional element, means for decoding microinstructions issued from a microprogram, means for transferring to the adding means one of the numbers produced by the producing means, first means for controlling the transfer of the orders contained in the decoded microinstruction, on the one hand, to the control inputs of the transferring means and on the other hand to the adding means, second means for controlling the transfer of the signals produced by the decoding assembly to the control inputs of the transferring means, means responsive to the decoding means for memorizing an order for multiplying two operands placed in the first and in the second register, said memorizing means being adapted to actuate either the first controlling means or the second controlling means in accordance with the decoded microinstruction relating respectively to a multiplication of the two operands or another operation.
Claim 2
Independent Claim
293 words
A device for carrying out arithmetical and logical operations upon control of a microprogram comprising first, second and third registers, adapted to contain operands to be processed, consisting of a series of bits of increasing significance, one additional element for memorizing the least significant bit of the second register, means for simultaneously producing numbers respectively equal to the value of the operand contained in the first register, to its conjugated value, to twice the value of the operand, to the conjugated value of twice the value of the operand and to zero, means for adding two binary numbers, an assembly for decoding the two less significant bits of the second register and the bit contained in the additional element, means for shifting the numbers contained in the adding means and in the second register, means for transmitting these numbers, after shifting thereof, to the third register, the second register and to the additional element, means for decoding microinstructions issued from a microprogram, means for transferring to the adding means one of the numbers produced by the producing means, first means for controlling the transfer of the orders contained in the decoded microinstruction, on the one hand, to the control inputs of the transferring means and on the other hand to the adding means, second means for controlling the transfer of the signals produced by the decoding assembly to the control inputs of the transferring means, means responsive to the decoding means for memorizing an order for multiplying two operands placed in the first and in the second register, said memorizing means being adapted to actuate either the first controlling means or the second controlling means in accordance with the decoded microinstruction relating respectively to a multiplication of the two operands or another operation.
Claim 3
Dependent Claim
51 words
A device according to claim 1, wherein the memorizing means comprises a flip-flop circuit having one control input connected to the decoding means, one output connected to the second controlling means and to means for self-operated control of the operating cycles and the other output connected to the first controlling means.
Claim 4
Dependent Claim
83 words
A device according to claim 1, wherein the means for self-operated control of the operating cycles comprises a counter, means for introducing in the counter a predetermined initial number and means for comparing the number contained in the counter with a second predetermined number, the difference between these two numbers being equal to the number of successive operating cycles to be carried out, the comparison means producing, at the end of the cycles, a signal for modifying the state of the memorizing means.
Claim 5
Dependent Claim
84 words
A device according to claim 1, wherein the shifting means comprises first shifting means for shifting by two rows, towards the less significant binary elements, the numbers contained in the adding means and in the second register, upon control of means for ensuring the self-operated control of the operating cycles and second shifting means for shifting by one row, towards the more or less significant binary elements, the numbers contained in the adding means and the third register upon control of the decoding means.
Claim 6
Dependent Claim
175 words
A device according to claim 1, wherein the adding means and the third register each comprise a sign binary element affected to the sign bit, and the adding means and the third register each comprise an additional binary element, and further comprising means for transferring in the additional binary element of the third register the same bit as that contained iN the sign binary element of said third register when a binary number is transferred to said register upon a control external to the device, means for transferring to the additional binary element of the third register the bit contained in the sign binary element of the adding means when a shifting of the content from the third register is effected towards the most significant binary elemen5s, and means for transferring to the additional element of the third register the bit contained in the additional binary element of the adding means when a shifting by one or two rows of the number contained in the third register is effected towards the less significant binary elements.
Claim 7
Dependent Claim
55 words
A device according to claim 5, comprising means for transferring to the additional binary element of the adding means the bit contained in the additional binary element of the third register and means for transferring to the additional binary element of the adding means the sign bit of the numbers produced by the producing means.
Claim 8
Dependent Claim
69 words
A device according to claim 5, comprising a test and normalization system including two gates of the exclusive OR type, each connected to the output terminal of the additional binary element of the adding means, on the one hand, and respectively to the output terminal of the sign binary element and to the binary element assigned to the most significant bit of the adding means, on the other hand.
Claim 9
Dependent Claim
54 words
A device according to claim 1, further comprising means for producing in the correct sequence the signals issued from the binary elements of the adding means and means for inverting the sequence of production of a predetermined number n of the signals issued from the successive binary elements assigned to bits of increasing significance.
Claim 10
Independent Claim
110 words
A device for carrying out arithmetical and logical operations upon control of a microprogram comprising an assembly means for conducting multiplication of two operands, means for decoding microinstructions issued from the microprogram, first gate means for controlling the transfer to the assembly means of control signals relating to the operation to be carried out provided by a microinstruction, second gate means for controlling the sequential operations relating to multiplication of the two operands and means responsive to the decoding means, for activating either the second gate means or the first gate means respectively according to whether the decoded microinstruction relates to a multiplication of the two operands or another operation.
Claim 11
Independent Claim
110 words
A device for carrying out arithmetical and logical operations upon control of a microprogram comprising an assembly means for conducting multiplication of two operands, means for decoding microinstructions issued from the microprogram, first gate means for controlling the transfer to the assembly means of control signals relating to the operation to be carried out provided by a microinstruction, second gate means for controlling the sequential operations relating to multiplication of the two operands and means responsive to the decoding means, for activating either the second gate means or the first gate means respectively according to whether the decoded microinstruction relates to a multiplication of the two operands or another operation.
Claim 12
Independent Claim
193 words
A device for carrying out arithmetical and logical operations upon control of a microprogram comprising means for decoding microinstructions issued from the microprogram, a multiplier means including register means for storing two operands and a partial product of said operands, means for generating different multiples of a first operand, adding means, means for transferring selected multiples of the first operand into the adding means upon control of the decoding means, means for decoding the three less significant bits of the second operand, means for shifting in the register means the numbers corresponding to the second operand and partial products of said operands, counter means for controlling the number of operating cycles of the multiplication, first gate means for controlling the transfer to the multiplier means of control signals relating to the operation to be carried out and provided by the microinstruction, second gate means for controlling the sequential operations relating to multiplication of the two operands and means including a bistable flip-flop for controlling automatic processing of successive cycles of operations when the decoded microinstruction involves a multiplication of two operands, said automatic processing means being initiated by the means for decoding microinstructions.
Claim 13
Independent Claim
193 words
A device for carrying out arithmetical and logical operations upon control of a microprogram comprising means for decoding microinstructions issued from the microprogram, a multiplier means including register means for storing two operands and a partial product of said operands, means for generating different multiples of a first operand, adding means, means for transferring selected multiples of the first operand into the adding means upon control of the decoding means, means for decoding the three less significant bits of the second operand, means for shifting in the register means the numbers corresponding to the second operand and partial products of said operands, counter means for controlling the number of operating cycles of the multiplication, first gate means for controlling the transfer to the multiplier means of control signals relating to the operation to be carried out and provided by the microinstruction, second gate means for controlling the sequential operations relating to multiplication of the two operands and means including a bistable flip-flop for controlling automatic processing of successive cycles of operations when the decoded microinstruction involves a multiplication of two operands, said automatic processing means being initiated by the means for decoding microinstructions.
Claim 14
Dependent Claim
178 words
A device according to claim 10, wherein the register means comprise a register for a multiplier and wherein the adding means and said register comprise each on the one hand a sign biNary element affected to the sign bit, and on the other hand an additional binary element, further comprising means for transferring in the additional binary element of said register means the same bit as that contained in the sign binary element of said register means when a binary number is transferred to said register means upon a control external to the device, means for transferring to the additional binary element of said register the bit contained in the sign binary element of the adding means when a shifting of the content from said register is effected towards the most significant bits, and means for transferring to the additional element of said register the bit contained in the additional binary element of the adding means when a shifting by one or two rows of the number contained in said register is effected towards the less significant bits.
Claim 15
Dependent Claim
61 words
A device according to claim 11, comprising means for transferring to the additional binary element of the adding means the bit contained in the additional binary element of said register and means for transferring to the additional binary element of the adding means the sign bit of the numbers produced by the means for generating different multiples of the first operand.
Claim 16
Dependent Claim
69 words
A device according to claim 11, comprising a test and normalization system including two gates of the exclusive OR type, each connected to the output terminal of the additional binary element of the adding means, on the one hand, and respectively to the output terminal of the sign binary element and to the binary element assigned to the most significant bit of the adding means, on the other hand.
Claim 17
Dependent Claim
54 words
A device according to claim 10, further comprising means for producing in the correct sequence the signals issued from the binary elements of the adding means and means for inverting the sequence of production of a predetermined number n of the signals issued from the successive binary elements assigned to bits of increasing significance.
Claim 18
Independent Claim
284 words
A device for carrying out arithmetical and logical operations upon control of a microprogram comprising an assembly including adding means for conducting multiplication of two operands transferred into register means, means for decoding microinstructions issued from the microprogram, first gate means for controlling the transfer to the assembly of control signals relating to the operation to be carried out provided by the microinstruction, second gate means for controlling the sequential operations relating to multiplication of the two operands and means initiated by the decoding means for activating either the second gate means or the first gate means respectively according as the decoded microinstruction relates to a multiplication of the two operands or another operation, wherein the register means included a register for a multiplier and wherein the adding means and said register comprise each on the one hand a sign binary element affected to the sign bit, and on the other hand an additional binary element, further comprising means for transferring to the additional binary element of said register the same bit as that contained in the sign binary element of said register when a binary number is transferred to said register upon a control external to the device, means for transferring to the additional binary element of said register the bit contained in the sign binary element of the adding means when a shifting of the content from said register is effected towards the most significant bits, and means for transferring to the additional element of said register the bit contained in the additional binary element of the adding means when a shifting by one or two rows of the number contained in said register is effected towards the less significant binary elements.
Claim 19
Independent Claim
284 words
A device for carrying out arithmetical and logical operations upon control of a microprogram comprising an assembly including adding means for conducting multiplication of two operands transferred into register means, means for decoding microinstructions issued from the microprogram, first gate means for controlling the transfer to the assembly of control signals relating to the operation to be carried out provided by the microinstruction, second gate means for controlling the sequential operations relating to multiplication of the two operands and means initiated by the decoding means for activating either the second gate means or the first gate means respectively according as the decoded microinstruction relates to a multiplication of the two operands or another operation, wherein the register means included a register for a multiplier and wherein the adding means and said register comprise each on the one hand a sign binary element affected to the sign bit, and on the other hand an additional binary element, further comprising means for transferring to the additional binary element of said register the same bit as that contained in the sign binary element of said register when a binary number is transferred to said register upon a control external to the device, means for transferring to the additional binary element of said register the bit contained in the sign binary element of the adding means when a shifting of the content from said register is effected towards the most significant bits, and means for transferring to the additional element of said register the bit contained in the additional binary element of the adding means when a shifting by one or two rows of the number contained in said register is effected towards the less significant binary elements.
Claim 20
Dependent Claim
72 words
A device according to claim 15, wherein said assembly comprises means for generating different multiples of a multiplicand comprising means for transferring to the additional binary element of the adding means the bit contained in the additiOnal binary element of said register and means for transferring to the additional binary element of the adding means the sign bit of the numbers produced by the means for generating different multiples of the multiplicand.
Claim 21
Dependent Claim
69 words
A device according to claim 15, comprising a test and normalization system including two gates of the exclusive OR type, each connected to the output terminal of the additional binary element of the adding means, on the one hand, and respectively to the output terminal of the sign binary element and to the binary element assigned to the most significant bit of the addition means, on the other hand.
Claim 22
Dependent Claim
54 words
A device according to claim 15, further comprising means for producing in the correct sequence the signals issued from the binary elements of the adding means and means for inverting the sequence of production of a predetermined number n of the signals issued from the successive binary elements assigned to bits of increasing significance.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-01-20 | 1978-07-22 | 1979-01-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-01-20 | 1982-07-22 | 1983-01-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-01-20 | 1986-07-22 | 1987-01-21 | $7700.00 | Window Closed / Lapsed |