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US3936856A Expired / Lapsed US ⏱️ 0.0 years remaining

Space-charge-limited integrated circuit structure

Assignee: International Business Machines Corp
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Filing: 1974-05-28
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Granted: 1976-02-03
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Expires: 1994-05-28
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Abstract

Abstract A space-charge-limited integrated circuit structure featuring optimized geometry to allow maximum packing density of the transistors in a semiconductor substrate. The widths of any two isolated regions of the same conductivity type are established in relation to the width of the region separating the isolated regions. The width of the region which separates two isolated regions having the same conductivity type as the high resistivity substrate must be greater than 0.75 times the width of either of the isolated regions. Conversely, the width of the region which separates the isolated regions having the opposite conductivity type to the substrate must be greater than 0.25 times the width of either of the isolated regions.

Inventors

  • 👤 Steven Magdo

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 13:05
CPC Classifications
H; H10; H10D; H10D99/00

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 172 words
An integrated circuit structure comprising: a high resistivity substrate of at least 10,000 ohm-cm semiconductor material of a first conductivity type; a plurality of impurity zones of said first conductivity type and a second conductivity type extending from one surface of said substrate to the interior thereof to form at least first and second space-charge-limited transistors of a first conductivity type; an isolation zone of said second conductivity type separating the collectors of said transistors; the ratio of the lateral width of said isolation zone to the lateral width of either of said collectors being greater than 0.75; the emitter and collector of each said transistor being isolated from one another by a base zone of said second conductivity type, the ratio of the lateral width of said base zone to the lateral width of either of said emitter and collector zones being greater than 0.75; and the ratio of the lateral width of said collector to the lateral width of either of said base and isolation zones being greater than 0.25.
Claim 2
Dependent Claim 172 words
An integrated circuit structure comprising: a high resistivity substrate of at least 10,000 ohm-cm semiconductor material of a first conductivity type; a plurality of impurity zones of said first conductivity type and a second conductivity type extending from one surface of said substrate to the interior thereof to form at least first and second space-charge-limited transistors of a first conductivity type; an isolation zone of said second conductivity type separating the collectors of said transistors; the ratio of the lateral width of said isolation zone to the lateral width of either of said collectors being greater than 0.75; the emitter and collector of each said transistor being isolated from one another by a base zone of said second conductivity type, the ratio of the lateral width of said base zone to the lateral width of either of said emitter and collector zones being greater than 0.75; and the ratio of the lateral width of said collector to the lateral width of either of said base and isolation zones being greater than 0.25.
Claim 3
Dependent Claim 34 words
An integrated circuit structure as in claim 1 wherein at least one of said space-charge-limited transistors comprises an enclosed configuration in which the corners of said collectors are rounded to avoid flux fringing effects.
Claim 4
Dependent Claim 19 words
An integrated circuit structure as in claim 2 wherein the emitter of said transistor is configured as a ring.
Claim 5
Dependent Claim 31 words
An integrated circuit structure as in claim 1 further comprising another of said second-conductivity-type zones encircled by another zone of said first conductivity type, the former zone functioning as a resistor.
Claim 6
Dependent Claim 168 words
An integrated circuit structure comprising: a high resistivity substrate of at least 10,000 ohm-cm semiconductor material of a first conductivity type; a plurality of impurity zones of said first conductivity type and a second conductivity type extending from one surface of said substrate to the interior thereof to form at least first and second space-charge-limited transistors of a second conductivity type; an isolation zone of said first conductivity type separating the collectors of said transistors; the ratio of the lateral width of said isolation zone to the lateral widths of said collector regions being greater than 0.25; the emitter and collector of each said transistor being isolated from one another by a base zone of said first conductivity type, the ratio of the lateral width of said base to the lateral width of either of said emitter and collector being greater than 0.25; and the ratio of the lateral width of said collector to the lateral width of either of base and isolation zones being greater than 0.75.
Claim 7
Dependent Claim 168 words
An integrated circuit structure comprising: a high resistivity substrate of at least 10,000 ohm-cm semiconductor material of a first conductivity type; a plurality of impurity zones of said first conductivity type and a second conductivity type extending from one surface of said substrate to the interior thereof to form at least first and second space-charge-limited transistors of a second conductivity type; an isolation zone of said first conductivity type separating the collectors of said transistors; the ratio of the lateral width of said isolation zone to the lateral widths of said collector regions being greater than 0.25; the emitter and collector of each said transistor being isolated from one another by a base zone of said first conductivity type, the ratio of the lateral width of said base to the lateral width of either of said emitter and collector being greater than 0.25; and the ratio of the lateral width of said collector to the lateral width of either of base and isolation zones being greater than 0.75.
Claim 8
Dependent Claim 33 words
An integrated circuit structure as in claim 5 further comprising another of said second conductivity type zones encircled by another zone of said first conductivity type, the former zone functioning as a resistor.
Claim 9
Dependent Claim 245 words
An integrated circuit structure comprising: a high resistivity substrate of at least 10,000 ohm-cm semiconductor material of a first conductivity type; a plurality of impurity zones of said first conductivity type and a second conductivity type extending from one surface of said substrate to the interior thereof to form first and second space-charge-limited transistors of first and second conductivity type, respectively; first and second isolation zones of said first and second conductivity type, respectively, separating said transistors, said first isolation zone disposed nearer said transistor of said second conductivity type; the ratio of the lateral width of said first isolation zone to the width of said second isolation zone and the collector of said second transistor being greater than 0.25; the ratio of the lateral width of said second isolation zone to the width of said first isolation zone and the collector of said first transistor being greater than 0.75; the emitter and the collector of said first transistor being isolated from one another by a base zone of said second conductivity type, the ratio of the lateral width of said base zone to the lateral width of either of said emitter and collector zones being greater than 0.75; the emitter and collector of said second transistor being isolated from one another by a base zone of said first conductivity type, the ratio of the lateral width of said base zone to the lateral width of said emitter and collector zones being greater than 0.25.
Claim 10
Dependent Claim 245 words
An integrated circuit structure comprising: a high resistivity substrate of at least 10,000 ohm-cm semiconductor material of a first conductivity type; a plurality of impurity zones of said first conductivity type and a second conductivity type extending from one surface of said substrate to the interior thereof to form first and second space-charge-limited transistors of first and second conductivity type, respectively; first and second isolation zones of said first and second conductivity type, respectively, separating said transistors, said first isolation zone disposed nearer said transistor of said second conductivity type; the ratio of the lateral width of said first isolation zone to the width of said second isolation zone and the collector of said second transistor being greater than 0.25; the ratio of the lateral width of said second isolation zone to the width of said first isolation zone and the collector of said first transistor being greater than 0.75; the emitter and the collector of said first transistor being isolated from one another by a base zone of said second conductivity type, the ratio of the lateral width of said base zone to the lateral width of either of said emitter and collector zones being greater than 0.75; the emitter and collector of said second transistor being isolated from one another by a base zone of said first conductivity type, the ratio of the lateral width of said base zone to the lateral width of said emitter and collector zones being greater than 0.25.
Claim 11
Dependent Claim 35 words
An integrated circuit structure as in claim 7 wherein said space-charge-limited transistor of said first conductivity type comprises an enclosed configuration in which the corners of said collector is rounded to avoid flux fringing effects.
Claim 12
Dependent Claim 20 words
An integrated circuit structure as in claim 8 wherein the emitter of said first transistor is configured as a ring.
Claim 13
Dependent Claim 31 words
An integrated circuit structure as in claim 7 further comprising another of said second-conductivity-type zones encircled by another zone of said first conductivity type, the former zone functioning as a resistor.

References Cited (Backward Citations)

US3275911A Cited
US3396317A Cited
US3493824A Cited
US3569800A Cited
US3614555A Cited
US3688132A Cited
US3591840A Cited
US3840886A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-02-02 1979-08-04 1980-02-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-02-02 1983-08-04 1984-02-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-02-02 1987-08-04 1988-02-03 $7700.00 Window Closed / Lapsed

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