Transistor power and root computing system

Claim 2

A non-linear transistor computing element comprising: an operational amplifier having an output and positive and negative inputs, a first transistor having its collector connected to the negative input of said amplifier, and a second transistor having its base connected to the output of said amplifier, said first and second transistors being operably connected so that the output of said operational amplifier is determined by the feedback loop comprising said first and second transistors and having a non-linear relationship to the input determined by the collector current of at least one of said transistors operating with a near zero collector base voltage.

Claim 3

A circuit for producing an output having a power functional relationship to the input comprising the structure of claim 1 and further comprising: a second operational amplifier having an output and positive and negative inputs, a third transistor having its collector connected with the negative input of said second operational amplifier and its emitter connected with the output of said first operational amplifier, a fourth transistor having its collector connected to the base of said third transistor and its base connected to its collector, a first resistor connected to the negative input of said first operational amplifier and having as its input the input to said circuit, and a second resistor connected between the output of said second operational amplifier and the negative input thereof.

Claim 4

The circuit of claim 2 in which a square functional output to input relationship is produced.

Claim 5

A circuit for producing an output having an inverse power functional relationship to the input comprising the structure of claim 1 and further comprising: a second operational amplifier having an output and positive and negative inputs, a third transistor having its collector connected with the base of said first transistor and having its base connected to its collector, a fourth transistor having its collector connected to the negative input of said second operational amplifier and its emitter connected with the emitter of said second transistor, a first resistor connected to the negative input of said first operational amplifier and having as its input the input to said circuit, and a second resistor connected between the output of said second operational amplifier and the negative input thereof.

Claim 6

The circuit of claim 2 in which a square root functional output to input relationship is produced.

Claim 7

A circuit for producing an output having a product functional relationship to first and second inputs comprising the structure of claim 1 and further comprising: a second operational amplifier having an output and positive and negative inputs, the output of said second operational amplifier being connected to the emitter of said second transistor and the negative input of said second operational amplifier being connected to the collector of said second transistor, a third transistor having its emitter connected with the output of said second operational amplifier, a fourth transistor having its emitter connected with the base of said third transistor and having its base and collector connected, a third operational amplifier having an output and positive and negative inputs, said negative input being connected to the collector of said third transistor, a first resistor connected to the negative input of said first operational amplifier and having as its input one of said inputs to said circuit, a second resistor connected to the negative input of said second operational amplifier and having as its input the second input to said circuit, and a third resistor connected between the output of said third operational amplifier and the negative input thereof.

Claim 8

A circuit for producing an output having a geometric means functional relationship to first and second inputs comprising the structure of claim 1 and further comprising: a second operational amplifier having an output and positive and negative inputs, the output of said second operational amplifier being connected to the emitter of second transistor and the negative input of said second operational amplifier being connected to the collector of said second transistor, a third transistor having its emitter connected to the output of said second operational amplifier and its base connected to its collector, a fourth transistor having its emitter connected to the collector of said third transistor, a third operational amplifier having an output and positive and negative inputs, the negative input thereof being connected to the connector of said fourth transistor, a first resistor connected to the negative input of said first operational amplifier and having as its input one of said inputs to said circuit, a second resistor connected to the negative input of said second operational amplifier and having as its input the second input to said circuit, and a third resistor connected between the output of said third operational amplifier and the negative input thereof.

Claim 9

The circuit of claim 1 wherein said transistors are diffused base bipolar transistors.

Claim 10

A computational circuit having a non-linear input voltage to output voltage functional relationship comprising a first operational amplifier having as its input the input voltage to said circuit, an input transistor string associated with said first operational amplifier, said string having at least one active element transistor which has a near zero collector-base voltage and the collector current serves as the computational reference, a second operational amplifier having as its output the output voltage for said circuit, and an output transistor string connecting the output of said first operational amplifier to the input of said second operational amplifier, said string having at least one active element transistor which has a near zero collector-base voltage and the collector current serves as the computational reference, said circuit having an input voltage to output voltage functional relationship defined by an equation of the type: Z = X.sup.a/b where Z = output voltage X = input voltage a = number of active elements in the input transistor string b = number of active elements in the output transistor string

Claim 11

A computational circuit having a non-linear input voltage to output voltage functional relationship comprising a first operational amplifier having as its input the input voltage to said circuit, an input transistor string associated with said first operational amplifier, said string having at least one active element transistor which has a near zero collector-base voltage and the collector current serves as the computational reference, a second operational amplifier having as its output the output voltage for said circuit, and an output transistor string connecting the output of said first operational amplifier to the input of said second operational amplifier, said string having at least one active element transistor which has a near zero collector-base voltage and the collector current serves as the computational reference, said circuit having an input voltage to output voltage functional relationship defined by an equation of the type: Z = X.sup.a/b where Z = output voltage X = input voltage a = number of active elements in the input transistor string b = number of active elements in the output transistor string

Claim 12

The circuit of claim 9 in which the number of transistors in the output string is the same as the number of transistors in the input string so that temperature compensation is obtained.

Claim 13

The circuit of claim 9 and further comprising a third operational amplifier having as its input a second input to said circuit, and a second input transistor string associated with said third operational amplifier, said string having at least one active element transistor which has a near zero collector-base voltage and the collector current serves as the computational reference, the output of said third operational amplifier being summed with the output of said first operational amplifier.

Claim 14

The circuit of claim 11 in which there is one active element in the output transistor string and the product of the inputs is the output of said circuit.

Claim 15

The circuit of claim 11 in which there are two active elements in the output transistor string and the geometric mean of the inputs is the output of said circuit.