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US3999043A Expired / Lapsed US ⏱️ 0.0 years remaining

Pulse width detection circuit for electro-optical label reading system

Assignee: Servo Corp of America
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Filing: 1975-06-02
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Granted: 1976-12-21
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Expires: 1995-06-02
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Abstract

Abstract A circuit for producing an output pulse of predetermined amplitude and a width equal to the mid amplitude width of an input pulse from an electro-optical label reading system is provided. The present circuit comprises delay line means having a first output terminal and a second output terminal with the signal at the second output terminal being delayed twice the time of the delay at the first terminal. The first output terminal of the delay line is connected to an amplifier operative to double the amplitude of the signal applied thereto. The output of the amplifier is connected to one input of each of first and second comparators with the other input to the comparators respectively connected to the input signal source and the second terminal of the delay line. The output of the comparators is connected to the input to an AND gate with the output from the AND gate providing the desired pulse width information.

Inventors

  • 👤 Charles Reiss
  • 👤 Leonard Zuckerman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 03:14
CPC Classifications
G; G06; G06K; G06K7/00; G06K7/10; G06K7/10544; G06K7/10821; G06K7/10851; B; B61; B61L; B61L25/00; B61L25/02; B61L25/04; B61L25/041

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 241 words
A circuit for producing an output pulse of predetermined amplitude and a width equal to the mid amplitude width of an input pulse from an input pulse source, said circuit comprising: delay line means having an input terminal connected to said input pulse source, a first output terminal and a second output terminal, the output of said delay line at said first output terminal being delayed in time with respect to said input pulse by a first predetermined period and the output of said delay line at said second output terminal being delayed in time with respect to said input pulse by twice said predetermined period; amplifier means connected to said delay line first output terminal for doubling the amplitude of the output of said first terminal; first comparator means having a first input connected to said input pulse source, a second input connected to said amplifier and an output; second comparator means having a first input connected to said amplifier, a second input connected to said delay line second output terminal and an output; gate means having a first input connected to said first comparator output and a second input connected to said second comparator output; a capacitor connected to said amplifier; a voltage divider subcircuit shunted across said capacitor; and, a third comparator having a first input connected to said amplifier, a second input connected to said subcircuit, and an output forming an additional input to said gate means.
Claim 2
Dependent Claim 241 words
A circuit for producing an output pulse of predetermined amplitude and a width equal to the mid amplitude width of an input pulse from an input pulse source, said circuit comprising: delay line means having an input terminal connected to said input pulse source, a first output terminal and a second output terminal, the output of said delay line at said first output terminal being delayed in time with respect to said input pulse by a first predetermined period and the output of said delay line at said second output terminal being delayed in time with respect to said input pulse by twice said predetermined period; amplifier means connected to said delay line first output terminal for doubling the amplitude of the output of said first terminal; first comparator means having a first input connected to said input pulse source, a second input connected to said amplifier and an output; second comparator means having a first input connected to said amplifier, a second input connected to said delay line second output terminal and an output; gate means having a first input connected to said first comparator output and a second input connected to said second comparator output; a capacitor connected to said amplifier; a voltage divider subcircuit shunted across said capacitor; and, a third comparator having a first input connected to said amplifier, a second input connected to said subcircuit, and an output forming an additional input to said gate means.
Claim 3
Dependent Claim 268 words
In an electro-optical label reading system including a label containing coded data, apparatus for optically scanning said label, and a sensor operative in response to light reflected from said label to produce input signal pulses representative of said coded data, the improvement of a pulse width detector circuit comprising: a delay line having an input terminal, a first output terminal and a second output terminal, the delay at said second output terminal being twice that at said first output terminal; means for applying said input signal pulses to said delay line input terminal; amplifier means connected to said delay line first output terminal and operative to produce output pulses equal to twice the output of said input pulses; first and second comparators each having a first and second input terminal and an output terminal; means connecting the output of said amplifier to the second input terminal of both said first and second comparators; means connecting said first comparator first terminal to said input signal pulse applying means; means connecting the second output terminal of said delay line to said second comparator first input terminal; gate means responsive to output signals from both said first and second comparators, said gate means having a first input connected to the output of said first comparator and a second input connected to the output of said second comparator; a capacitor connected to said amplifier; a voltage divider subcircuit shunted across said capacitor; and, a third comparator having a first input connected to said amplifier, a second input connected to said subcircuit, and an output forming an additional input to said gate means.
Claim 4
Dependent Claim 268 words
In an electro-optical label reading system including a label containing coded data, apparatus for optically scanning said label, and a sensor operative in response to light reflected from said label to produce input signal pulses representative of said coded data, the improvement of a pulse width detector circuit comprising: a delay line having an input terminal, a first output terminal and a second output terminal, the delay at said second output terminal being twice that at said first output terminal; means for applying said input signal pulses to said delay line input terminal; amplifier means connected to said delay line first output terminal and operative to produce output pulses equal to twice the output of said input pulses; first and second comparators each having a first and second input terminal and an output terminal; means connecting the output of said amplifier to the second input terminal of both said first and second comparators; means connecting said first comparator first terminal to said input signal pulse applying means; means connecting the second output terminal of said delay line to said second comparator first input terminal; gate means responsive to output signals from both said first and second comparators, said gate means having a first input connected to the output of said first comparator and a second input connected to the output of said second comparator; a capacitor connected to said amplifier; a voltage divider subcircuit shunted across said capacitor; and, a third comparator having a first input connected to said amplifier, a second input connected to said subcircuit, and an output forming an additional input to said gate means.

References Cited (Backward Citations)

US2866896A Cited
US3299271A Cited
US3668532A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-12-21 1980-06-21 1980-12-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-12-21 1984-06-21 1984-12-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-12-21 1988-06-21 1988-12-21 $7700.00 Window Closed / Lapsed

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