US4001784A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Data processing system having a plurality of input/output channels and physical resources dedicated to distinct and interruptible service levels
Assignee: Bull HN Information Systems Italia SpA
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Filing: 1974-12-20
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Granted: 1977-01-04
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Expires: 1994-12-20
Abstract
Abstract In a data processing system having a plurality of input/output channels, a first plurality of physical resources is dedicated to each of the channels. Said first plurality is sufficient only to enable standard data character exchanges between each of the channels and the central processing unit in a time-sharing manner. A second plurality of physical resources (including registers and logic) is provided which is dedicated to a corresponding plurality of service classes. The service classes are ordered according to a priority criterion and selectively assigned to different channels in accordance with the priority level of the interrupt which has requested the service. In this manner, while services of the same class are not reciprocally interruptible, services of different classes on different channels are hierarchically interruptible.
Inventors
- 👤 Angelo Bardotti
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 12:54
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/46; G06F9/48; G06F9/4806; G06F9/4812; G06F13/00; G06F13/14; G06F13/20; G06F13/24; G06F13/26; G06F9/461; G06F9/4831
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
240 words
In a microprogrammed computer system having a plurality of input/output channels for connecting a central processor to peripheral units, apparatus which comprises: first means in said central processor for receiving interrupt requests from said peripheral units through said input/output channels; second means said central processor coupled to said first means for assigning priority to said interrupt requests, said second means including first assignment means for assigning said interrupt request to priority classes based on the type of service requested by said interrupt request and second assignment means for assigning priority to said interrupt requests within each said priority class based on the input/output channel carrying said interrupt request; and a plurality of gating and storage means in said central processor, wherein groups of said plurality of gating and storage means are specifically dedicated to each of said priority classes of interrupt requests for enabling execution of the corresponding type of service, said groups of gating and storage means being responsive to said second means for enabling the execution of a service of another class having higher priority utilizing the one of said gating and storage means specifically dedicated to said higher priority class, wherein a one of said gating and storage means groups can execute a service associated with a one of said priority classes in parallel with execution of a service associated with a second of said priority classes by a second of said gating and storage means groups.
Claim 2
Dependent Claim
240 words
In a microprogrammed computer system having a plurality of input/output channels for connecting a central processor to peripheral units, apparatus which comprises: first means in said central processor for receiving interrupt requests from said peripheral units through said input/output channels; second means said central processor coupled to said first means for assigning priority to said interrupt requests, said second means including first assignment means for assigning said interrupt request to priority classes based on the type of service requested by said interrupt request and second assignment means for assigning priority to said interrupt requests within each said priority class based on the input/output channel carrying said interrupt request; and a plurality of gating and storage means in said central processor, wherein groups of said plurality of gating and storage means are specifically dedicated to each of said priority classes of interrupt requests for enabling execution of the corresponding type of service, said groups of gating and storage means being responsive to said second means for enabling the execution of a service of another class having higher priority utilizing the one of said gating and storage means specifically dedicated to said higher priority class, wherein a one of said gating and storage means groups can execute a service associated with a one of said priority classes in parallel with execution of a service associated with a second of said priority classes by a second of said gating and storage means groups.
Claim 3
Dependent Claim
87 words
A microprogrammed computer system as claimed in claim 1 further comprising a microprogram control memory within said central processor and wherein said plurality of gating and storage means comprises: a plurality of addressing registers coupled to and for addressing said microprogram control memory, one register per class of services; and a plurality of working register sets responsive to said second means and coupled to said microprogram control memory for receiving microcommands, each set being specifically dedicated to and sufficient for enabling execution of a class of services.
Claim 4
Dependent Claim
226 words
A data processing system having a plurality of input/output channels connecting a central processing unit to a plurality of peripheral units, said system comprising: first means in said central processing unit coupled to said input/output channels for receiving interrupt requests and data from said peripheral units; second means in said central processing unit coupled to said first means for receiving said interrupt requests and for classifying said interrupt request into service priority classes, third means coupled to said second means for ordering said interrupt requests within said service priority classes according to its input/output channel source; a first plurality of gating and register means dedicated to each input/output channel, said first plurality coupled to said first means for receiving data and responsive to said second means for enabling character exchange interrupt requests; and a second plurality of gating and register means dedicated to each service priority class, said second plurality of gating and register means coupled to said first means for receiving data and responsive to said second means for interrupting a first service being executed and enabling execution of another service having higher priority than said first service, wherein said second plurality of gating and register means can provide for execution of a service in a one of said input/output channels in parallel with execution of character exchange in a second of said input/output channels.
Claim 5
Dependent Claim
226 words
A data processing system having a plurality of input/output channels connecting a central processing unit to a plurality of peripheral units, said system comprising: first means in said central processing unit coupled to said input/output channels for receiving interrupt requests and data from said peripheral units; second means in said central processing unit coupled to said first means for receiving said interrupt requests and for classifying said interrupt request into service priority classes, third means coupled to said second means for ordering said interrupt requests within said service priority classes according to its input/output channel source; a first plurality of gating and register means dedicated to each input/output channel, said first plurality coupled to said first means for receiving data and responsive to said second means for enabling character exchange interrupt requests; and a second plurality of gating and register means dedicated to each service priority class, said second plurality of gating and register means coupled to said first means for receiving data and responsive to said second means for interrupting a first service being executed and enabling execution of another service having higher priority than said first service, wherein said second plurality of gating and register means can provide for execution of a service in a one of said input/output channels in parallel with execution of character exchange in a second of said input/output channels.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-01-04 | 1980-07-05 | 1981-01-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-01-04 | 1984-07-05 | 1985-01-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-01-04 | 1988-07-05 | 1989-01-04 | $7700.00 | Window Closed / Lapsed |