Target detection method and apparatus for reducing range-smearing error caused by relative target motion

Claim 2

For use with a target detection system adapted for integrating and detectably processing a succession of discrete range samples received as pulsed transmissions during a series of interpulse periods T; a method of reducing range-smearing error produced by pulse-to-pulse motion of the pulse transmission source relative to the detection system, said method including the steps of: trackably determining the relative speed of said target computing the relative pulse-to-pulse speed of said target, storing in separate cells of a shiftable register a different succession of range sample sums derived by successively adding each of a series of incoming range samples from each range to a sum of previously-received range samples from each range, controllably shifting said register to align a particular range sample sum with each incoming range sample of said particular range, said alignment control being performed on a pulse-to-pulse basis in accordance with said computed pulse-to-pulse target speed to align each incoming range sample with the stored range sample sums within the closest range, summing said incoming range sample with said aligned range sample, and storing said summed incoming range sample in said register for subsequent processing.

Claim 3

The method of claim 1 further including the step of: producing by digital integration of said computed pulse-to-pulse speed an integer number proportional to the number of range samples through which the target moves during each interpulse period, said register shifting being responsive to said integer number.

Claim 4

For use with a target detection system adapted to integrate and detectably process a succession of discrete range samples derived from the target and received as pulsed transmissions during a series of interpulse periods; apparatus for reducing range-smearing error produced by pulse-to-pulse motion of the target relative to the detection system, said motion carrying said target past a certain number of range samples during each interpulse period of said series; said apparatus comprising: means for determining the relative speed of said target, means for computing the relative pulse-to-pulse speed of the target, means for receiving said computed speed data and generating on a pulse-to-pulse basis an integer number proportional to the number of said range samples passed during each interpulse period, a shiftable register having a plurality of cells for separately storing discrete samples of said different range sample successions, said register further being provided with an output for each of said stored range samples, circuit means coupled to said register output for summing each incoming range sample with a particular one of said stored samples associated with said incoming range, circuit means coupling said summing means to said register for storing said sum in a register cell, control means for shifting said register to permit the delivery of selected stored range samples to said summing means, and means coupling said generated integer number to said control means for shiftably selecting for said summing the stored range sample sum within the closest range to the incoming range sample, said register output also providing a path for delivery of said stored range samples for subsequent processing.

Claim 5

For use with a target detection system adapted to integrate and detectably process a succession of discrete range samples derived from the target and received as pulsed transmissions during a series of interpulse periods; apparatus for reducing range-smearing error produced by pulse-to-pulse motion of the target relative to the detection system, said motion carrying said target past a certain number of range samples during each interpulse period of said series; said apparatus comprising: means for determining the relative speed of said target, means for computing the relative pulse-to-pulse speed of the target, means for receiving said computed speed data and generating on a pulse-to-pulse basis an integer number proportional to the number of said range samples passed during each interpulse period, a shiftable register having a plurality of cells for separately storing discrete samples of said different range sample successions, said register further being provided with an output for each of said stored range samples, circuit means coupled to said register output for summing each incoming range sample with a particular one of said stored samples associated with said incoming range, circuit means coupling said summing means to said register for storing said sum in a register cell, control means for shifting said register to permit the delivery of selected stored range samples to said summing means, and means coupling said generated integer number to said control means for shiftably selecting for said summing the stored range sample sum within the closest range to the incoming range sample, said register output also providing a path for delivery of said stored range samples for subsequent processing.

Claim 6

The apparatus of claim 3 wherein said means for generating said integer number includes: computer means for estimating target speed, means for multiplying said estimate by the ratio T/R in which T is the length of an interpulse period and R is the intersample range, said multiplication providing an estimated speed for each interpulse period (i), a two-channel digital integration means coupled to said multiplier for producing on a first channel a number representing the total number of range samples to the source of the i th period and on a second channel a number representing the total number of range samples to the source of the (i th - 1) period, truncator means for rounding off to the nearest range sample said second channel number, a summer having inputs coupled to both of said channels for producing a number representing the difference in range samples between the i th and the (i th - 1) periods which is the number of range sample shifts during an interpulse period, and means for rounding-off said summer output to produce said integer number.

Claim 7

The apparatus of claim 3 wherein said circuit means coupling said register to said summer includes: a loop multiplier means for averaging a predetermined number of range samples.