Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
150 words
In combination, a carrier having binary information encoded in an information area matrix on said carrier, said information matrix including at least a scrambler code in a predetermined bit position and sequence in said information matrix, and a user code wherein the bit position and sequence of the user code within the information area matrix is dependent upon the numerical valve of the scrambler code, and a verifier, said verifier comprising means for reading said information from said information area matrix, means for storing said information, means for determining the numerical value of said scrambler code, and means for determining the matrix bit position and sequence of said user code as a function of the numerical value of said scrambler code, means for manually entering a comparison code into said verifier, means for comparing said comparison code to said user code, and means for indicating the result of said comparison.
Claim 2
Dependent Claim
150 words
In combination, a carrier having binary information encoded in an information area matrix on said carrier, said information matrix including at least a scrambler code in a predetermined bit position and sequence in said information matrix, and a user code wherein the bit position and sequence of the user code within the information area matrix is dependent upon the numerical valve of the scrambler code, and a verifier, said verifier comprising means for reading said information from said information area matrix, means for storing said information, means for determining the numerical value of said scrambler code, and means for determining the matrix bit position and sequence of said user code as a function of the numerical value of said scrambler code, means for manually entering a comparison code into said verifier, means for comparing said comparison code to said user code, and means for indicating the result of said comparison.
Claim 3
Dependent Claim
54 words
The combination as defined in claim 1 wherein said information area matrix includes a checksum encoded thereon, said verifier further comprising means for performing binary addition of said information area matrix, means for comparing the result of said binary addition to said check-sum, and means for indicating the result of said last mentioned comparison.
Claim 4
Dependent Claim
59 words
The combination as defined in claim 2 wherein said check-sum is encoded on said carrier in a predetermined matrix bit position and sequence dependent upon the numerical value of the scrambler code and said verifier includes means for determining the matrix bit position and sequence of said check-sum as a function of the numerical value of said scrambler code.
Claim 5
Dependent Claim
28 words
The combination as defined in claim 1 wherein said information is encoded on said carrier by a plurality of apertures formed through said carrier in a predetermined order.
Claim 6
Dependent Claim
27 words
The combination as defined in claim 1 wherein said verifier further comprises means to selectively mechanically retain said carrier in dependence on the result of said comparison.
Claim 7
Dependent Claim
25 words
The combination as defined in claim 1 wherein said verifier further comprises means for transmitting and receiving information to and from a central data processor.
Claim 8
Dependent Claim
27 words
The combination as defined in claim 1 wherein said verifier further comprises means to selectively actuate an external apparatus in dependence on the result of said comparison.
Claim 9
Dependent Claim
59 words
The combination as defined in claim 1 wherein said means for storing said information comprises a random access memory unit, said means for manually entering a comparison code comprises a keyboard, and said means for comparing said comparison code to said user code comprises a pre-programmed processor unit operatively coupled with said random access memory unit and said keyboard.
Claim 10
Dependent Claim
28 words
The combination as defined in claim 8 and including a read-only memory operatively coupled to said processing unit and pre-programmed with an instruction set for said processing unit.