← Back to Patent Explorer
US4041474A Expired / Lapsed US ⏱️ 0.0 years remaining

Memory matrix controller

Assignee: US Philips Corp
•
Filing: 1976-01-30
•
Granted: 1977-08-09
•
Expires: 1996-01-30
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A device including a memory matrix comprising memory cells provided at crossings of rows and columns, wherein on selection of a given row of the matrix, selection means enable a memory element associated with a further row to be selected. The selection means are driven from a drive device on the basis of a one-step Increment instruction and/or a one-step Decrement instruction. The drive device is a component part of an arithmetic device in which arithmetic carry-bits arise.

Inventors

  • 👤 Claude Jan Principe Frederik Le Can

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 21:06
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/4063; G11C11/407; G11C11/408; G11C11/4087; G11C17/00; G11C17/08; G11C17/10; G11C17/12; G11C8/00

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 166 words
A memory storage device, comprising a plurality of memory elements organized as a matrix of rows and columns, each of said rows including at least one marked memory element associated therewith; first selection means having a first terminal associated therewith for selection of a first predetermined one of said rows; second selection means, having a second terminal associated therewith for selection of a second predetermined one of said rows; control means comprising first and second signal lines coupled with said respective first and second terminals, and a logical component for supplying a control signal to said first and second selection means, said control signal being applied to said first terminal and the complement of said control signal being supplied to said second terminal; and means for activating said control means, by means of a single predetermined instruction, comprising a central processor having a plurality of control lines, including a control line, activated by an increment instruction executed by said central processor, connected to said control means.
Claim 2
Dependent Claim 166 words
A memory storage device, comprising a plurality of memory elements organized as a matrix of rows and columns, each of said rows including at least one marked memory element associated therewith; first selection means having a first terminal associated therewith for selection of a first predetermined one of said rows; second selection means, having a second terminal associated therewith for selection of a second predetermined one of said rows; control means comprising first and second signal lines coupled with said respective first and second terminals, and a logical component for supplying a control signal to said first and second selection means, said control signal being applied to said first terminal and the complement of said control signal being supplied to said second terminal; and means for activating said control means, by means of a single predetermined instruction, comprising a central processor having a plurality of control lines, including a control line, activated by an increment instruction executed by said central processor, connected to said control means.

References Cited (Backward Citations)

US3899777A Cited
US3983543A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-08-08 1981-02-07 1981-08-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-08-08 1985-02-07 1985-08-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-08-08 1989-02-07 1989-08-09 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag