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US4054757A Expired / Lapsed US ⏱️ 0.0 years remaining

Conference circuit using PCM techniques

Assignee: Alcatel Lucent NV
•
Filing: 1976-12-13
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Granted: 1977-10-18
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Expires: 1996-12-13
📄 Original PDF 🌐 Google Patents

Abstract

Abstract Conference circuit which uses a read/write memory divided into groups of memory lines, with each group corresponding to a conference. Each line is assigned to store data from a single subscriber and to store the code words coming from that subscriber. The memory stores non-linear subscribers' codes. The codes are expanded and the codes of other subscribers in the same conference are added and compressed for transmission and decoding at any other exchange of other conference members. The conference circuit may be inserted in one position of a group of junction circuits or may be placed in a subscriber line concentrator.

Inventors

  • 👤 Augustin LeJay

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 05:36
CPC Classifications
H; H04; H04Q; H04Q11/00; H04Q11/04; H04M; H04M3/00; H04M3/42; H04M3/56; H04M3/561; H04M3/568

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 190 words
A conference circuit for interconnecting plural subscribers within a PCM switching network having a predetermined frame repetition rate comprised of a plurality of successive time slots, the invention including: memory means for storing non-linear coded data received from subscribeers during time slots allotted to the respective subscribers, expander means receptive of coded data received from said memory means, for expanding the received data, adder means for receiving expanded data and for combining the expanded data with data fed back from the output of the adder means, and further means for compressing linear data received from the adder means, wherein said memory means comprises a read/write memory comprised of a memory line for each subscriber served, the lines of said memory means being grouped into plural groups of consecutive time slots with the number of groups corresponding to the number of simultaneous conferences possible and the number of lines per group corresponding to the maximum number of subscribers per conference, means for writing into said memory means at the rate of one line per time slot, and means for successively reading the lines of an entire group during one time slot.
Claim 2
Dependent Claim 190 words
A conference circuit for interconnecting plural subscribers within a PCM switching network having a predetermined frame repetition rate comprised of a plurality of successive time slots, the invention including: memory means for storing non-linear coded data received from subscribeers during time slots allotted to the respective subscribers, expander means receptive of coded data received from said memory means, for expanding the received data, adder means for receiving expanded data and for combining the expanded data with data fed back from the output of the adder means, and further means for compressing linear data received from the adder means, wherein said memory means comprises a read/write memory comprised of a memory line for each subscriber served, the lines of said memory means being grouped into plural groups of consecutive time slots with the number of groups corresponding to the number of simultaneous conferences possible and the number of lines per group corresponding to the maximum number of subscribers per conference, means for writing into said memory means at the rate of one line per time slot, and means for successively reading the lines of an entire group during one time slot.
Claim 3
Dependent Claim 61 words
A conference circuit according to claim 1, wherein said adder means has two inputs, one of which is connected to the output of the memory through said expander means while the other input is connected to its own output through first and second buffer registers controlled with a time shift, the said second buffer register being reset at each time slot.
Claim 4
Dependent Claim 37 words
A conference circuit according to claim 2, wherein one buffer register at the output of the said memory is reset when the address present at the memory corresponds to the address of the line to be written.
Claim 5
Dependent Claim 46 words
A conference circuit according to claim 3, further including an attenuation device for attenuating the codes at the input only for subscribers whose lines indicate a silent condition and for attenuating the added codes at the output only for subscribers whose lines exhibit a speech condition.
Claim 6
Dependent Claim 56 words
A conference circuit according to claim 4, wherein said attenuation device includes a speech detector connecting a first attenuator to the input of the conference circuit when the received codes correspond to a silent condition, and connecting a second attenuator to the output of the conference circuit when the received codes correspond to a speech condition.

References Cited (Backward Citations)

US3908089A Cited
US3984643A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-10-17 1981-04-18 1981-10-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-10-17 1985-04-18 1985-10-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-10-17 1989-04-18 1989-10-18 $7700.00 Window Closed / Lapsed

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