US4069482A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Target range sensor
Assignee: Hughes Missile Systems Co
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Filing: 1976-07-15
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Granted: 1978-01-17
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Expires: 1996-07-15
Abstract
Abstract The specification discloses a radar sensor for detecting short-range, slowly moving objects and using the range versus time data to develop a prediction of the time at which the range of the object will be at a minimum to the sensor. The sensor uses a pulse transmission of a radio frequency signal with object reflections being received and detected. Subsequent signal processing eliminates returns from clutter and stationary objects so that signals from low velocity objects can be detected. Computations are performed in a digital processor to compute an estimate of the time and of the range when the object will be closest to the sensor.
Inventors
- 👤 Clarence B. Parker
- 👤 Peter M. McCray
- 👤 L. Lamoyne Taylor
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 16:56
CPC Classifications
G; G01; G01S; G01S13/00; G01S13/02; G01S13/50; G01S13/505
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
216 words
A radar system comprising: a homodyne transceiver including means for directing received radio frequency signals in gated sections to range gated integrating means; range gated integrating means connected to receive said directed radio frequency signals for integrating the signals over the time period of a gated section, and including means for directing the integrated signal result to analog-to-digital converting means upon actuation by a control pulse; analog-to-digital converting means for converting the integrated signal result to a digital, pulsed component form upon actuation by a control pulse; delay line canceller and detector means for removing relatively low frequency, integrated signal digital components and for passing relatively higher frequency, integrated signal digital components to a delay line canceller and detector means output; digital component processor means coupled to said output for receiving over a period of time the passed relatively higher frequency, integrated signal digital components from the delay line canceller and detector means output and for computing from said received components a predicted position closest to said homodyne transceiver which a selected target object will traverse; and digital bit pulse control logic means for generating and selectively sending to the homodyne transceiver means, to the range gated integrating means, and to the analog-to-digital converting means control pulses for actuating each respective means in predetermined sequential order.
Claim 2
Dependent Claim
216 words
A radar system comprising: a homodyne transceiver including means for directing received radio frequency signals in gated sections to range gated integrating means; range gated integrating means connected to receive said directed radio frequency signals for integrating the signals over the time period of a gated section, and including means for directing the integrated signal result to analog-to-digital converting means upon actuation by a control pulse; analog-to-digital converting means for converting the integrated signal result to a digital, pulsed component form upon actuation by a control pulse; delay line canceller and detector means for removing relatively low frequency, integrated signal digital components and for passing relatively higher frequency, integrated signal digital components to a delay line canceller and detector means output; digital component processor means coupled to said output for receiving over a period of time the passed relatively higher frequency, integrated signal digital components from the delay line canceller and detector means output and for computing from said received components a predicted position closest to said homodyne transceiver which a selected target object will traverse; and digital bit pulse control logic means for generating and selectively sending to the homodyne transceiver means, to the range gated integrating means, and to the analog-to-digital converting means control pulses for actuating each respective means in predetermined sequential order.
Claim 3
Dependent Claim
36 words
The radar system of claim 1 wherein said range gated integrating means includes a plurality of range gate switches, each of which switches includes a field effect transistor connected in series with a series resistor-capacitor network.
Claim 4
Dependent Claim
24 words
The radar system of claim 2 wherein each resistor-capacitor net work is in series with selectively conducting nodes of its associated field effect transistor.
Claim 5
Dependent Claim
64 words
The radar system of claim 3 wherein the integration is accomplished by accumulation of charge in the capacitor during a gated time period, wherein there is a resistor-capacitor network independently for each of a series of discrete time intervals in a range, and wherein the integrating means provides a sensitivity versus range-time scaling function which compensates for the inverse range-squared variation in return signal.
Claim 6
Dependent Claim
46 words
The radar system of claim 4 wherein the range gate switches further include means for applying range gating signals to the resistor-capacitor networks, means for sequentially gating the outputs of the resistor-capacitor networks to the analog-to-digital converting means, and means for resetting all resistor-capacitor networks concurrently.
Claim 7
Dependent Claim
27 words
The radar system of claim 5 wherein the switching of the range gate switches is actuated by control signals from the digital bit pulse control logic means.
Claim 8
Dependent Claim
21 words
The radar system of claim 6 wherein each range gate switch is actuated sequentially relative to the actuation of adjacent switches.
Claim 9
Dependent Claim
66 words
The radar system of claim 3 wherein the field effect transistor is actuated into the conducting mode by a pulse in sequential order relative to pulses going to all other field effect transistors in their respective range gate switches, and wherein the digital bit pulse control logic means includes shift register means for generating said pulses in sequential order upon control actuation by a control pulse.
Claim 10
Dependent Claim
39 words
The radar system of claim 8 wherein said plurality of range gate switches selectively gates signals to the resistor-capacitor networks, sequentially gates the output of said resistor-capacitor networks to the analog-to-digital converting means, and concurrently discharges the resistor-capacitor networks.
Claim 11
Dependent Claim
140 words
A range gate sequence switch control system, comprising: shift register means for providing sequentially a plurality of pulse signals to respective electronic switches upon control actuation by a single received pulse signal; a plurality of electronic switches, each connected electrically in series with a resistor-capacitor network and with an independent electrical analog voltage signal input network to selectively apply the electrical analog voltage signal input to the associated resistor-capacitor network when the respective electronic switch is conducting; an output line; readout means for electrically disconnecting the electrical analog voltage signal inputs from the plurality of electronic switches, including means for electrically connecting the output line to the plurality of electronic switches and means for sequentially closing each electronic switch; and restoring and discharge means for restoring direct current to the signal input network and simultaneously discharging the complete resistor-capacitor network.
Claim 12
Dependent Claim
140 words
A range gate sequence switch control system, comprising: shift register means for providing sequentially a plurality of pulse signals to respective electronic switches upon control actuation by a single received pulse signal; a plurality of electronic switches, each connected electrically in series with a resistor-capacitor network and with an independent electrical analog voltage signal input network to selectively apply the electrical analog voltage signal input to the associated resistor-capacitor network when the respective electronic switch is conducting; an output line; readout means for electrically disconnecting the electrical analog voltage signal inputs from the plurality of electronic switches, including means for electrically connecting the output line to the plurality of electronic switches and means for sequentially closing each electronic switch; and restoring and discharge means for restoring direct current to the signal input network and simultaneously discharging the complete resistor-capacitor network.
Claim 13
Dependent Claim
51 words
The system of claim 10 wherein each electronic switch includes a field effect transistor having a gain node connected to an output of an adjacent switch transistor for biasing said gain node when one of said plurality of pulse signals from the shift register means is received at the electronic switch.
Claim 14
Dependent Claim
44 words
The system of claim 11 wherein the shift register means comprises a plurality of tandem connected shift registers capable of a series of at least 16 pulse signal outputs; and wherein said plurality of electronic switches includes at least 14 of said electronic switches.
Claim 15
Dependent Claim
27 words
The system of claim 12 wherein each of the tandem connected shift registers has a digital data input selectively connected in parallel with each other shift register.
Claim 16
Dependent Claim
35 words
The system of claim 13 wherein the pulse signals exist at an average repetition time of 6.6 microseconds and with a uniform pseudo-random distribution of time intervals in the range of 5 to 8.2 microseconds.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-01-16 | 1981-07-18 | 1982-01-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-01-16 | 1985-07-18 | 1986-01-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-01-16 | 1989-07-18 | 1990-01-17 | $7700.00 | Window Closed / Lapsed |