US4086542A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Complementary push-pull amplifier
Assignee: Nippon Gakki Co Ltd
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Filing: 1977-02-10
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Granted: 1978-04-25
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Expires: 1997-02-10
Abstract
Abstract A complementary push-pull amplifier comprising a pair of complementary transistors each of which is connected to a voltage source through a relatively large resistance and having the base biased with a voltage formed from the emitter-collector voltage of the transistor. Means for equalizing the amplitudes of second order distortion caused by the respective transistors is provided in a portion of the circuit other than the emitter circuit. The collector current is stabilized by the relatively large resistance connected to the collector and the asymmetry of the pair of transistors can be corrected by the amplitude equalizing means for cancellation of the second order distortion.
Inventors
- 👤 Shingo Kamiya
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 12:28
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/30; H03F3/3069; H03F3/3076
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
153 words
A complementary push-pull amplifier circuit comprising: a pair of complementary transistors each including base, collector and emitter and connected in push-pull relation; an input circuit connected to the base of each of said pair of transistors; an output circuit connected to the collector of each of said pair of transistors; means for supplying a voltage to said pair of transistors; a resistance connected in series with the collector circuit of said transistors for dropping down a large part of the supply voltage and applying a small part of said supply voltage across said transistors; and bias voltage circuit means connected to the electrodes of each transistor for dividing the voltage between the collector and the emitter of the transistor and establishing the base bias voltage between the base and the emitter of the transistor by said divided voltage, whereby the idling current through said transistors is substantially stabilized against changes in external conditions.
Claim 2
Dependent Claim
153 words
A complementary push-pull amplifier circuit comprising: a pair of complementary transistors each including base, collector and emitter and connected in push-pull relation; an input circuit connected to the base of each of said pair of transistors; an output circuit connected to the collector of each of said pair of transistors; means for supplying a voltage to said pair of transistors; a resistance connected in series with the collector circuit of said transistors for dropping down a large part of the supply voltage and applying a small part of said supply voltage across said transistors; and bias voltage circuit means connected to the electrodes of each transistor for dividing the voltage between the collector and the emitter of the transistor and establishing the base bias voltage between the base and the emitter of the transistor by said divided voltage, whereby the idling current through said transistors is substantially stabilized against changes in external conditions.
Claim 3
Dependent Claim
46 words
A complementary push-pull amplifier circuit according to claim 1, wherein said bias voltage circuit means comprises a pair of voltage dividers, each having the end terminals connected to the collector and the emitter of the transistor and the voltage dividing terminal connected to the base thereof.
Claim 4
Dependent Claim
27 words
A complementary push-pull amplifier circuit according to claim 1, wherein said resistance consists of two similar resistors each connected to the collector of each of said transistors.
Claim 5
Dependent Claim
33 words
A complementary push-pull amplifier circuit according to claim 1, further comprising means for equalizing amplitudes of second order distortion contained in output signals of said complementary pair of transistors, thereby cancelling said distortion.
Claim 6
Dependent Claim
45 words
A complementary push-pull amplifier according to claim 4, wherein said amplitude equalizing means comprises means for adjusting the collector current of at least one of said pair of transistors, said collector current adjusting means being disposed in other than the emitter circuits of said transistors.
Claim 7
Dependent Claim
28 words
A complementary push-pull amplifier circuit according to claim 5, wherein said collector current adjusting means is formed of a variable resistor which constitutes part of said resistance means.
Claim 8
Dependent Claim
28 words
A complementary push-pull amplifier circuit according to claim 5, wherein said collector current adjusting means comprises a variable resistor which constitutes part of said bias voltage circuit means.
Claim 9
Dependent Claim
43 words
A complementary push-pull amplifier according to claim 4, further comprising load resistance means for said pair of transistors included in said output circuit, said amplitude equalizing means being means for adjusting the ratio of the respective load resistances of said pair of transistors.
Claim 10
Dependent Claim
41 words
A complementary push-pull amplifier circuit according to claim 8, wherein said load resistance ratio adjusting means comprises a potentiometer having fixed terminals respectively connected to the collectors of said transistors through a capacitor, and a sliding terminal connected to the ground.
Claim 11
Dependent Claim
27 words
A complementary push-pull amplifier according to claim 4, wherein said amplitude equalizing means comprises means for adjusting the mixture ratio of outputs of said pair of transistors.
Claim 12
Dependent Claim
46 words
A complementary push-pull amplifier circuit according to claim 10, wherein said output mixture ratio adusting means comprises a potentiometer having fixed terminals respectively connected to the collectors of said transistors through a capacitor, and a sliding terminal connected to an output terminal of the amplifier circuit.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-04-24 | 1981-10-24 | 1982-04-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-04-24 | 1985-10-24 | 1986-04-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-04-24 | 1989-10-24 | 1990-04-25 | $7700.00 | Window Closed / Lapsed |