Charge-coupled device digital-to-analog converter

Claim 1

A digital-to-analog converter comprising: a semiconductor substrate, an insulating layer on said substrate, a source of charge carriers in said substrate, a source of input serial digital signals, least significant digit first, said signals being applied to said source of charge carriers to produce a series of charge carriers corresponding to said input digital signals, a first charge splitting gate on said layer, a first control gate on said layer between said source and said first charge splitting gate, a second charge splitting gate on said layer, a second control gate on said layer between said first and second charge splitting gates, a collector of charge carriers in said substrate, and a third control gate on said layer between said second charge splitting gate and said collector, said gates being adapted to receive a predetermined sequence of control signal pulses independent of the value of the number represented by an input digital signal whereby (1) a charge carrier corresponding to a respective one of said input signals is admitted, by action of said first control gate, to a first charge storage well beneath said first charge splitting gate, (2) said admitted charge carrier is additively combined with any charge carrier pre-existing in said well, (3) the additively combined charge carriers are equally divided, by action of said second control gate, between said first charge storage well and a second charge storage well beneath said second charge splitting gate, and (4) the divided charge carrier in said second well is admitted, by action of said third control gate, to said collector whereby serial digital-to-analog conversion is accomplished.