Novel method and apparatus for hermetic encapsulation for integrated circuits and the like

Claim 1

A package assembly for hermetically sealing semi-conductor type chips and the like, comprising: a base member formed of an insulating material and having a chip mounting surface formed on one side thereof; at least one row of openings formed in said base member, one end of each of said openings terminating at said mounting surface; a plurality of conductive pins extending through said opening, one end of each of said pins defining a lead mounting surface, a major portion of said one end of each of said pins being planar and substantially flush with said mounting surface; said base member including means for forming a hermetic seal between each of said pins and their associated pin openings; a lid formed of an insulating material having a mating surface abutting said mounting surface, said mating surface of said lid overlying said one end of said pins and including a recess formed therein, said recess defining a hollow interior volume adapted to receive a semi-conductor chip or the like; and sealing means located between said mating surface of said lid and said mounting surface of said base member for hermetically isolating each of said pin seals from each other and from said recess.

Claim 10

A method of forming package assemblies for hermetically sealing semiconductor chips and the like comprising the steps of: forming a base member having a plurality of through openings arranged in a row and at least one flat mounting surface out of an insulative material; providing a plurality of conductive pins and straight-cutting a first end of each of said pins to form a flat bonding surface; forming an assembly by placing said pins in said openings; mounting said assembly in a fixture to maintain the alignment of said pins and said base member so that said bonding surfaces of said pins are maintained flush with said mounting surface of said base member; heating said assembly at a temperature above the flow point of said insulating material and cooling the assembly whereby said insulating material, which is selected to have a coefficient of contraction which is at least equal to and preferably greater than that of said pins, intimately surrounds and engages said pins to form a hermetic seal; and controlling the sealing temperature and the sealing time to maintain said insulative material at a relatively low viscosity, said sealing temperature having a maximum value below the working point of the insulative material.

Claim 11

A method of forming package assemblies for hermetically sealing semiconductor chips and the like comprising the steps of: forming a base member having a plurality of through openings arranged in a row and at least one flat mounting surface out of an insulative material; providing a plurality of conductive pins and straight-cutting a first end of each of said pins to form a flat bonding surface; forming an assembly by placing said pins in said openings; mounting said assembly in a fixture to maintain the alignment of said pins and said base member so that said bonding surfaces of said pins are maintained flush with said mounting surface of said base member; heating said assembly at a temperature above the flow point of said insulating material and cooling the assembly whereby said insulating material, which is selected to have a coefficient of contraction which is at least equal to and preferably greater than that of said pins, intimately surrounds and engages said pins to form a hermetic seal; and controlling the sealing temperature and the sealing time to maintain said insulative material at a relatively low viscosity, said sealing temperature having a maximum value below the working point of the insulative material.

Claim 14

A method for hermetically sealing semiconductor chips and the like within a package assembly having a base assembly whose base mounting surface and pin is flat and flush with the flat bonding surfaces of the base assembly conductive pins comprising the steps of: providing a chip lead frame comprised of leads mounted upon a carrier tape or screened pattern and a chip having bonding pads; bonding the inner ends of the leads to the bonding pads in a one-step process; positioning the carrier tape relative to the base member to align a portion of the leads extending outwardly from the chip with associated pin bonding surfaces; punching the leads and chip away from the carrier strip and urging the aligned lead positions into imtimate engagement with the pin bonding surfaces; maintaining the engaged lead and pin bonding surfaces under compression and applying heat thereto to bond the leads to the pins in a one-step process.

Claim 15

A method for hermetically sealing semiconductor chips and the like within a package assembly having a base assembly whose base mounting surface and pin is flat and flush with the flat bonding surfaces of the base assembly conductive pins comprising the steps of: providing a chip lead frame comprised of leads mounted upon a carrier tape or screened pattern and a chip having bonding pads; bonding the inner ends of the leads to the bonding pads in a one-step process; positioning the carrier tape relative to the base member to align a portion of the leads extending outwardly from the chip with associated pin bonding surfaces; punching the leads and chip away from the carrier strip and urging the aligned lead positions into imtimate engagement with the pin bonding surfaces; maintaining the engaged lead and pin bonding surfaces under compression and applying heat thereto to bond the leads to the pins in a one-step process.