Circuit to improve rise time and/or reduce parasitic power supply spike current in bipolar transistor logic circuits

Claim 2

A circuit having an improved switching speed responsive to at least one input logic signal and being coupled to an output terminal comprising: (a) a first switching means responsive to the input logic signal for establishing a first logic level at the output terminal, said first switching means having at least an input electrode and an output electrode; (b) a second switching means coupled to said first switching means and responsive to a drive signal derived from the input logic signal for establishing a second logic level at the output terminal; (c) capacitive means connected to said input electrode for deriving a transient signal in response to a transition in the input logic signal; (d) means for coupling said transient signal to said second switching means for providing an alternate current path for said drive signal to help turn off said second switching means when said first switching means is switching from the nonconducting state to the conducting state.

Claim 3

A circuit as set forth in claim 1 wherein said means for coupling said transient signal to said second switching means further comprises an amplifier to amplify said derived transient signal.

Claim 4

A circuit as set forth in claim 1 wherein said first and second switching means are transistors.

Claim 5

A circuit as set forth in claim 3 further comprising a coupling means for interconnecting the emitter of said first switching transistor, the collector of said second switching transistor, and said output terminal to provide a push-pull driver to improve the switching speed of said circuit independent of the steady state level of the input logic signal.

Claim 6

A circuit as set forth in claim 1 further comprising: (a) a third switching means responsive to the input logic signal for providing drive to said second switching means; (b) means for coupling said transient signal to said third switching means for providing an alternate current path to help turn off said third switching means when said first switching means is switching from the nonconducting state to the conducting state.

Claim 7

A circuit as set forth in claim 5 wherein said means for coupling said transient signal to said third switching means further comprises an amplifier to amplify said derived transient signal.

Claim 8

A circuit as set forth in claim 5 wherein said first, second, and third switching means are transistors.

Claim 9

A circuit having an improved switching speed responsible to at least one input logic signal and coupled to a load at an output terminal, comprising: (a) an input stage with means for receiving said input logic signals and generating an amplified input signal; (b) a phase splitting stage coupled to said input stage for splitting said amplified input signal into a first split phase signal which is in phase with said amplified input signal, and a second split phase signal which is 180° out of phase with said amplified input signal; (c) a first output driver stage comprising a first amplifier and a second amplifier connected serially for amplifying said second split phase signal to drive the load; (d) a second output driver stage comprising an amplifier for amplifying said first split phase signal, the output of said second output driver coupled to the output of said first output driver and the load for driving the load in a push-pull manner; (e) means for deriving a transient signal; (f) means for coupling said transient signal to said second split phase signal at the input to said second output driver stage during transitions at said output terminal from a low voltage level to a high voltage level to assist in turning off said second output driver stage.

Claim 10

A circuit having an improved switching speed responsible to at least one input logic signal and coupled to a load at an output terminal, comprising: (a) an input stage with means for receiving said input logic signals and generating an amplified input signal; (b) a phase splitting stage coupled to said input stage for splitting said amplified input signal into a first split phase signal which is in phase with said amplified input signal, and a second split phase signal which is 180° out of phase with said amplified input signal; (c) a first output driver stage comprising a first amplifier and a second amplifier connected serially for amplifying said second split phase signal to drive the load; (d) a second output driver stage comprising an amplifier for amplifying said first split phase signal, the output of said second output driver coupled to the output of said first output driver and the load for driving the load in a push-pull manner; (e) means for deriving a transient signal; (f) means for coupling said transient signal to said second split phase signal at the input to said second output driver stage during transitions at said output terminal from a low voltage level to a high voltage level to assist in turning off said second output driver stage.

Claim 11

A circuit as set forth in claim 8 wherein said means for deriving said transient signal comprises a capacitive means.

Claim 12

A circuit as set forth in claim 8 wherein said means for coupling said transient signal to said second split phase signal further comprises an amplifier to amplify said derived transient signal.

Claim 13

A circuit as set forth in claim 8 wherein said amplifiers of said stages are transistor amplifiers.

Claim 14

A circuit as set forth in claim 11 wherein said phase splitting stage comprises a transistor amplifier.

Claim 15

A circuit as set forth in claim 12 further comprising a means for coupling said transient signal to the input of said phase splitting stage to assist in turning off said phase splitting transistor amplifier.