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US4145624A Expired / Lapsed US ⏱️ 0.0 years remaining

Fet-teld combination with capacitively coupled output electrode means

Assignee: RCA Corp
•
Filing: 1977-07-18
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Granted: 1979-03-20
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Expires: 1997-07-18
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Abstract

Abstract A field effect transistor (FET) is connected in series to a transferred electron logic device (TELD), the TELD being a non-linear load resistor for the FET. The current thresholding property of the TELD and the saturation characteristics of the FET are utilized to produce an output pulsed signal of substantial voltage gain with fast rise time and short pulse width. An output electrode is capacitively coupled to the TELD to provide an output pulsed signal of alternating polarity for direct interconnection of devices in cascaded circuits.

Inventors

  • 👤 Lakshminarasimha C. Upadhyayula

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 16:40
CPC Classifications
H; H10; H10N; H10N89/00; H10N89/02; H03; H03K; H03K3/00; H03K3/02; H03K3/357; H03K19/00; H03K19/01; H03K19/017; H03K19/0175; H03K19/0185; H03K19/018507; H03K19/02; H03K19/08; H03K19/10

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 271 words
In combination: a field effect type transistor having drain, gate and source electrodes, said transistor being characterized by an ohmic region of operation in which the drain current varies with voltage and a constant-current region of operation in which the drain current is substantially constant with voltage; a transferred electron type device connected to said transistor to form a series current therethrough, said device being characterized by a transfer of electrons from a high to a low mobility sub-band and the formation of domains upon the application of an electric field above a threshold value, said device having a peak current at the threshold voltage and a lower current above the threshold voltage, said lower current being substantially constant with increasing voltage; said transistor being biased to operate in said constant-current region such that said drain current is below said peak current and above said lower current of said device; means for applying an input signal of a given polarity to the gate electrode of said transistor to increase the drain current to a level equal to or greater than the threshold current of said device causing thereby the formation of domains in said device and a decrease in said drain current to the level of said lower current of said device and producing thereby a shift in the operation of said transistor to said ohmic region and an output pulsed signal of a predetermined voltage gain; and electrode means capacitively coupled to said device for transmission of said output pulsed signal, the capacitive coupling of said electrode means producing an alternating positive and negative polarity in said output pulsed signal.
Claim 2
Dependent Claim 271 words
In combination: a field effect type transistor having drain, gate and source electrodes, said transistor being characterized by an ohmic region of operation in which the drain current varies with voltage and a constant-current region of operation in which the drain current is substantially constant with voltage; a transferred electron type device connected to said transistor to form a series current therethrough, said device being characterized by a transfer of electrons from a high to a low mobility sub-band and the formation of domains upon the application of an electric field above a threshold value, said device having a peak current at the threshold voltage and a lower current above the threshold voltage, said lower current being substantially constant with increasing voltage; said transistor being biased to operate in said constant-current region such that said drain current is below said peak current and above said lower current of said device; means for applying an input signal of a given polarity to the gate electrode of said transistor to increase the drain current to a level equal to or greater than the threshold current of said device causing thereby the formation of domains in said device and a decrease in said drain current to the level of said lower current of said device and producing thereby a shift in the operation of said transistor to said ohmic region and an output pulsed signal of a predetermined voltage gain; and electrode means capacitively coupled to said device for transmission of said output pulsed signal, the capacitive coupling of said electrode means producing an alternating positive and negative polarity in said output pulsed signal.
Claim 3
Dependent Claim 20 words
The combination according to claim 1, wherein said field effect type transistor is a metal semiconductor field effect transistor (MESFET).
Claim 4
Dependent Claim 20 words
The combination according to claim 1, wherein said field effect type transistor is biased to operate in the depletion mode.
Claim 5
Dependent Claim 53 words
The combination according to claim 1, wherein said transferred electron type device comprises a body of semiconductor material and spaced anode and cathode terminals connected to said body, and wherein said cathode terminal is connected to said drain electrode of said transistor and said source electrode of said transistor is connected to ground.
Claim 6
Dependent Claim 17 words
The combination according to claim 4, wherein the semiconductor material of said body is gallium arsenide (GaAs).

References Cited (Backward Citations)

US3115584A Cited
US3848141A Cited
US3980896A Cited
US4000415A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1982-03-19 1982-09-18 1983-03-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1986-03-19 1986-09-18 1987-03-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1990-03-19 1990-09-18 1991-03-20 $7700.00 Window Closed / Lapsed

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