Method and apparatus for the rotation of a binary-data matrix, intended particularly to be used as a storage unit having a two-way access mode for electronic computers

Claim 1

A method for rotating a binary-data matrix formed by a plurality of bit strings arranged as respective rows of the matrix, comprising the steps of: (a) rotating the bits of each string through a number of bit positions which number of bit positions increases by one from each string to the next string; (b) writing in parallel said strings having rotated bits into respective cell rows of a digital memory of the type including rows and columns of individually addressable cells; (c) reading out in parallel from said memory modified strings of bits, by addressing one cell of each cell column thereof, each of said modified bit strings including all the bits comprised in a respective row of a desired rotated matrix; and (d) rotating the bits of each modified string to arrange the sequence of said bits according to that of said respective row of the rotated matrix.

Claim 2

A method for rotating a binary-data matrix formed by a plurality of bit strings arranged as respective rows of the matrix, comprising the steps of: (a) rotating the bits of each string through a number of bit positions which number of bit positions increases by one from each string to the next string; (b) writing in parallel said strings having rotated bits into respective cell rows of a digital memory of the type including rows and columns of individually addressable cells; (c) reading out in parallel from said memory modified strings of bits, by addressing one cell of each cell column thereof, each of said modified bit strings including all the bits comprised in a respective row of a desired rotated matrix; and (d) rotating the bits of each modified string to arrange the sequence of said bits according to that of said respective row of the rotated matrix.

Claim 3

An apparatus for rotating a binary-data matrix formed by a plurality of bit strings arranged as respective rows of the matrix, comprising: (a) first bit-rotating means for sequentially receiving said bit strings of the matrix and rotating the bits of each string through a number of bit positions which number of bit positions increases by one from each string to the next string; (b) a digital memory including rows and columns of individually addressable cells, a data input of said memory connected to the output of said first bit-rotating means; (c) write and readout command generating means associated with said memory for controlling the writing of said strings having rotated bits into said memory and the reading out of modified strings of bits from said memory; (d) address generating means associated with said memory for addressing selected cells of said memory; (e) an address modifier interposed between said address generating means and said memory; (f) mode control means associated with said address modifier for changing the addressing of said memory by said address modifier from a writing condition, in which all the cells of a memory row are simultaneously addressed at any write command to allow parallel writing of said strings having rotated bits in respective cell rows of the memory, to a readout condition, in which one cell of each column is addressed at any readout command to allow parallel readout of said modified strings of bits each including all the bits comprised in a respective row of a desired rotated matrix; and (g) second bit-rotating means for sequentially receiving said modified strings from said memory and rotating the bits of each modified string to change the sequence of said bits according to that of said respective row of the rotated matrix.

Claim 4

An apparatus for rotating a binary-data matrix formed by a plurality of bit strings arranged as respective rows of the matrix, comprising: (a) first bit-rotating means for sequentially receiving said bit strings of the matrix and rotating the bits of each string through a number of bit positions which number of bit positions increases by one from each string to the next string; (b) a digital memory including rows and columns of individually addressable cells, a data input of said memory connected to the output of said first bit-rotating means; (c) write and readout command generating means associated with said memory for controlling the writing of said strings having rotated bits into said memory and the reading out of modified strings of bits from said memory; (d) address generating means associated with said memory for addressing selected cells of said memory; (e) an address modifier interposed between said address generating means and said memory; (f) mode control means associated with said address modifier for changing the addressing of said memory by said address modifier from a writing condition, in which all the cells of a memory row are simultaneously addressed at any write command to allow parallel writing of said strings having rotated bits in respective cell rows of the memory, to a readout condition, in which one cell of each column is addressed at any readout command to allow parallel readout of said modified strings of bits each including all the bits comprised in a respective row of a desired rotated matrix; and (g) second bit-rotating means for sequentially receiving said modified strings from said memory and rotating the bits of each modified string to change the sequence of said bits according to that of said respective row of the rotated matrix.