US4200502A
Expired / Lapsed
US
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Method for producing an electrical thin layer circuit
Assignee: Siemens AG
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Filing: 1979-03-12
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Granted: 1980-04-29
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Expires: 1999-03-12
Abstract
Abstract A method is disclosed for producing an electric thin layer circuit comprising at least one capacitor and a conductor path and/or a resistor. The number of masks required for the production of such a thin layer circuit is reduced. First and second layers of tantalum-aluminum alloy where the second layer has a tantalum share lower than the first, are applied on an insulating base. In a first masking and etching technique, areas of the first and second layers are etched off outside the circuit elements. At least the second layer is anodically oxidized and the anodically oxidized surface is covered with a silicon dioxide layer so as to form a two layer dielectric for the capacitor. In a second masking and etching technique, not-required areas of the silicon dioxide layer external to the capacitor are removed. By utilizing the silicon dioxide layer remaining as an etching mask, the not-required areas of the tantalum-aluminum oxide layer and the second tantalum-aluminum layer external to the capacitor are removed. In a third etching and masking technique, a conductive surface layer is applied over the silicon dioxide layer at the capacitor element to form a two-layer dielectric capacitor and over the first tantalum-aluminum layer to form the conductor path.
Inventors
- 👤 Wolf-Dieter Munz
- 👤 Siegfried Bock
- 👤 Hans W. Potzlberger
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 07:28
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D86/00; H10D86/01; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49082; Y10T29/49099; Y10T29/49117; Y10T29/49124; Y10T29/49155; Y10T29/49156
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
229 words
A method for producing an electric thin layer circuit comprising circuit elements including at least one capacitor and a conductor path comprising the steps of: (a) providing an insulating layer and applying a first layer of a tantalum-aluminum alloy having a tantalum share of between 30 and 70 atomic % on the insulating layer; (b) applying a second layer of a tantalum-aluminum alloy having a tantalum share of between 2 and 20 atomic % on the first layer; (c) forming circuit elements by a first masking and etching technique by etching off areas of the first and second layers outside the circuit elements by at least one etching; (d) anodically oxidizing an exposed surface of the first and second layers to form a tantalum-aluminum oxide layer and coating the anodically oxidized surface with a silicon dioxide layer; (e) removing by a second masking and etching technique not-required areas of the silicon dioxide layer external to the capacitor; (f) by utilizing the remaining silicon dioxide layer as an etching mask, selectively etching off the not-required areas of the tantalum-aluminum oxide layer and the second tantalum-aluminum layer external to the capacitor; and (g) by a third etching and masking technique applying a conductive surface layer over the silicon dioxide layer at the capacitor element to form a two-layer dielectric capacitor and over the first tantalum-aluminum layer to form the conductor path.
Claim 2
Independent Claim
229 words
A method for producing an electric thin layer circuit comprising circuit elements including at least one capacitor and a conductor path comprising the steps of: (a) providing an insulating layer and applying a first layer of a tantalum-aluminum alloy having a tantalum share of between 30 and 70 atomic % on the insulating layer; (b) applying a second layer of a tantalum-aluminum alloy having a tantalum share of between 2 and 20 atomic % on the first layer; (c) forming circuit elements by a first masking and etching technique by etching off areas of the first and second layers outside the circuit elements by at least one etching; (d) anodically oxidizing an exposed surface of the first and second layers to form a tantalum-aluminum oxide layer and coating the anodically oxidized surface with a silicon dioxide layer; (e) removing by a second masking and etching technique not-required areas of the silicon dioxide layer external to the capacitor; (f) by utilizing the remaining silicon dioxide layer as an etching mask, selectively etching off the not-required areas of the tantalum-aluminum oxide layer and the second tantalum-aluminum layer external to the capacitor; and (g) by a third etching and masking technique applying a conductive surface layer over the silicon dioxide layer at the capacitor element to form a two-layer dielectric capacitor and over the first tantalum-aluminum layer to form the conductor path.
Claim 3
Dependent Claim
24 words
A method according to claim 1 comprising the step of using a positive photolacquer for mask production in the second masking and etching technique.
Claim 4
Dependent Claim
21 words
A method according to claim 1 comprising the step of removing the not-required areas of the silicon dioxide layer by plasma-etching.
Claim 5
Dependent Claim
30 words
A method according to claim 1 comprising the step of etching off the not-required areas of the tantalum-aluminum oxide layer in a watery solution of phosphoric acid and chromic acid.
Claim 6
Dependent Claim
30 words
A method according to claim 1 comprising the step of etching off the not-required areas of the second tantalum-aluminum layer having the low tantalum share in a watery buffered fluorhydracid.
Claim 7
Dependent Claim
32 words
A method according to claim 1 comprising the step of providing a base electrode connection of the capacitor with a narrow path of the first tantalum-aluminum layer having the high tantalum share.
Claim 8
Dependent Claim
28 words
A method according to claim 6 comprising the step of laying out the base electrode connection as a narrow path about an effective capacitor surface in a fork-shape.
Claim 9
Dependent Claim
23 words
A method according to claim 7 comprising the step of selecting a width in the magnitude of 50 μm for the narrow path.
Claim 10
Dependent Claim
14 words
The method of claim 1 wherein the conductor path is provided as a resistor.
Claim 11
Independent Claim
229 words
A method for producing an electric thin layer circuit comprising circuit elements including at least one capacitor and a conductor path, comprising the steps of: (a) providing an insulating base and depositing thereon a first tantalum-aluminum alloy layer having a tantalum content of 30 to 70 atomic % and depositing on the first layer a second tantalum-aluminum alloy layer having a tantalum content between 2 and 20 atomic %; (b) covering the base with a mask in a first phototechnique and etching off areas of the first and second alloy layers external to the capacitor and conductor path to be produced; (c) undertaking an anodic oxidation for transforming the surface area of the second alloy layer into a tantalum-aluminum oxide layer; (d) applying a silicon dioxide layer onto the base; (e) in a second phototechnique, mounting a second mask on the silicon dioxide layer so that areas of the silicon dioxide layer can be etched off external to a dielectric region of the capacitor, and the tantalum-aluminum oxide layer areas external to the dielectric region can be etched off by using the remaining silicon dioxide layer as an etching mask; (f) applying a conductive surface layer over the base and in a third phototechnique, and by use of a third mask, the conductive surface layer is structured so as to provide a conductor path and a capacitor counter electrode.
Claim 12
Independent Claim
229 words
A method for producing an electric thin layer circuit comprising circuit elements including at least one capacitor and a conductor path, comprising the steps of: (a) providing an insulating base and depositing thereon a first tantalum-aluminum alloy layer having a tantalum content of 30 to 70 atomic % and depositing on the first layer a second tantalum-aluminum alloy layer having a tantalum content between 2 and 20 atomic %; (b) covering the base with a mask in a first phototechnique and etching off areas of the first and second alloy layers external to the capacitor and conductor path to be produced; (c) undertaking an anodic oxidation for transforming the surface area of the second alloy layer into a tantalum-aluminum oxide layer; (d) applying a silicon dioxide layer onto the base; (e) in a second phototechnique, mounting a second mask on the silicon dioxide layer so that areas of the silicon dioxide layer can be etched off external to a dielectric region of the capacitor, and the tantalum-aluminum oxide layer areas external to the dielectric region can be etched off by using the remaining silicon dioxide layer as an etching mask; (f) applying a conductive surface layer over the base and in a third phototechnique, and by use of a third mask, the conductive surface layer is structured so as to provide a conductor path and a capacitor counter electrode.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-04-29 | 1983-10-29 | 1984-04-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-04-29 | 1987-10-29 | 1988-04-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-04-29 | 1991-10-29 | 1992-04-29 | $7700.00 | Window Closed / Lapsed |