US4219880A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Signal-processing and conversion systems
Assignee: INVEST AMERICA COUNSELING SERVICES, INC. D/B/A FORKED CREEK TECHNOLOGIES A MD CORP.
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Filing: 1978-05-03
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Granted: 1980-08-26
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Expires: 1998-05-03
Abstract
Abstract A signal-processing system, particularly adapted to digitally process analog signals, and including computation apparatus which carries out operations on the signals, also includes a control memory with storage locations addressable in predetermined sequences and an operand memory with storage locations addressable in variable sequences. The control memory contains control information which controls the operations of the computation apparatus and the operand memory contains operand information which is operated upon by the computation apparatus with the signals which are processed. The variable sequences in which the storage locations in the operand memory are addressed are in part determined by information in the control memory. The computation apparatus includes a multiplier, an adder, and a delay memory which is used in providing variable delays in signals during processing. The system is particularly adapted to provide digital reverberation effects, such as echo effects and the simulation of rooms (echo chambers) with variable characteristics. The system incorporates analog to digital and digital to analog conversion systems having ranging capabilities. Digital shifting structure with the capability to shift digits in adjoining digit positions to other positions representative of multiplication or division by variable factors are incorporated into the conversion systems. This eliminates the need to treat independent ranging digits during the computation process by providing an accurate, integrated numerical representation of the signals received and provided by the computation apparatus. Particular embodiments of the conversion systems and of the remainder of the signal-processing system operate in the desirable 2's complement (binary) number system.
Inventors
- 👤 Charles R. Nichols
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 05:14
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/66; H03M1/70; H03M1/12; H03M1/18; H03M1/186; H04; H04S; H04S7/00; H04S7/30; H04S7/305
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
188 words
A system for processing signals, comprising: computation means for receiving said signals and for producing processed signals by carrying out operations in accordance with control information for controlling operations of said computation means and operand information to be operated on by said computation means; and controller means for storing said control information and said operand information and for providing signals representative of said control information and said operand information, said controller means including, control memory means coupled to said computation means and having a plurality of addressable information storage locations for storing said control information, control member addressing means for providing to said control memory means signals for addressing said storage locations in said control memory means for said providing by said control memory means, operand memory means coupled to said computation means and having a plurality of addressable information storage locations for storing said operand information, and operand memory addressing means for, concurrently with said providing by said control memory addressing means, providing signals to said operand memory means for addressing said storage locations in said operand memory means for said providing by said operand memory means.
Claim 2
Independent Claim
188 words
A system for processing signals, comprising: computation means for receiving said signals and for producing processed signals by carrying out operations in accordance with control information for controlling operations of said computation means and operand information to be operated on by said computation means; and controller means for storing said control information and said operand information and for providing signals representative of said control information and said operand information, said controller means including, control memory means coupled to said computation means and having a plurality of addressable information storage locations for storing said control information, control member addressing means for providing to said control memory means signals for addressing said storage locations in said control memory means for said providing by said control memory means, operand memory means coupled to said computation means and having a plurality of addressable information storage locations for storing said operand information, and operand memory addressing means for, concurrently with said providing by said control memory addressing means, providing signals to said operand memory means for addressing said storage locations in said operand memory means for said providing by said operand memory means.
Claim 3
Dependent Claim
23 words
A signal-processing system according to claim 1 for processing signals representative of sound signals wherein said processed signals are representative of sound signals.
Claim 4
Independent Claim
255 words
A system for processing signals, comprising: computation means for receiving said signals and for producing processed signals by carrying out operations in accordance with control information for controlling operations of said computation means and operand information to be operated on by said computation means, said computation means including, delay memory means having a plurality of addressable information storage locations for storing signals during said processing and for providing said stored signals after variable time delays, and delay memory addressing means for providing signals to said delay memory means for addressing said storage locations in said delay memory means for said storing and providing by said delay memory means; and controller means for providing signals representative of said control and operand information to said computation means, said controller means including, control memory means coupled to said computation means and havving a plurality of addressable information storage locations for storing control information, control memory addressing means for providing to said control memory means signals for consecutively addressing said storage locations in said control memory means in a sequence determined independently of information stored in said storage locations, for said providing by said control memory means, operand memory means coupled to said computation means and having a plurality of addressable information storage locations for storing operand information, and operand memory addressing means for, concurrently with said providing by said control memory addressing means, providing signals to said operand memory means for addressing said storage locations in said operand memory means for said providing by said operand memory means.
Claim 5
Independent Claim
255 words
A system for processing signals, comprising: computation means for receiving said signals and for producing processed signals by carrying out operations in accordance with control information for controlling operations of said computation means and operand information to be operated on by said computation means, said computation means including, delay memory means having a plurality of addressable information storage locations for storing signals during said processing and for providing said stored signals after variable time delays, and delay memory addressing means for providing signals to said delay memory means for addressing said storage locations in said delay memory means for said storing and providing by said delay memory means; and controller means for providing signals representative of said control and operand information to said computation means, said controller means including, control memory means coupled to said computation means and havving a plurality of addressable information storage locations for storing control information, control memory addressing means for providing to said control memory means signals for consecutively addressing said storage locations in said control memory means in a sequence determined independently of information stored in said storage locations, for said providing by said control memory means, operand memory means coupled to said computation means and having a plurality of addressable information storage locations for storing operand information, and operand memory addressing means for, concurrently with said providing by said control memory addressing means, providing signals to said operand memory means for addressing said storage locations in said operand memory means for said providing by said operand memory means.
Claim 6
Dependent Claim
23 words
A signal-processing system according to claim 3 for processing signals representative of sound signals wherein said processed signals are representative of sound signals.
Claim 7
Independent Claim
268 words
A system for processing an analog signal, comprising: analog to digital converter means for receiving said analog signal and for generating successive converted digitally-represented signal sets representative of said analog signal; computation means for producing successive processed digitally-represented signal sets by carrying out operations on said converted signal sets in accordance with control information for controlling operations of said computation means and operand information to be operated on by said computation means, said processed signal sets being representative of a processed analog signal; controller means for storing said control information and said operand information and for providing signals representative of said control information and said operand information, said controller means including, control memory means coupled to said computation means and having a plurality of addressable information storage locations for storing said control information, control memory addressing means for providing to said control memory means signals for consecutively addressing said storage locations in said control memory means in a sequence determined independently of information stored in said storage locations, for said providing by said control memory means, operand memory means coupled to said computation means and having a plurality of addressable information storage locations for storing said operand information, and operand memory addressing means for, concurrently with said providing by said control memory addressing means, providing signals to said operand memory means for addressing said storage locations in said operand memory means for said providing by said operand memory means; and digital to analog converter means for receiving said successive processed digitally-represented signal sets and for generating said processed analog signal of which said processed signal sets are representative.
Claim 8
Independent Claim
268 words
A system for processing an analog signal, comprising: analog to digital converter means for receiving said analog signal and for generating successive converted digitally-represented signal sets representative of said analog signal; computation means for producing successive processed digitally-represented signal sets by carrying out operations on said converted signal sets in accordance with control information for controlling operations of said computation means and operand information to be operated on by said computation means, said processed signal sets being representative of a processed analog signal; controller means for storing said control information and said operand information and for providing signals representative of said control information and said operand information, said controller means including, control memory means coupled to said computation means and having a plurality of addressable information storage locations for storing said control information, control memory addressing means for providing to said control memory means signals for consecutively addressing said storage locations in said control memory means in a sequence determined independently of information stored in said storage locations, for said providing by said control memory means, operand memory means coupled to said computation means and having a plurality of addressable information storage locations for storing said operand information, and operand memory addressing means for, concurrently with said providing by said control memory addressing means, providing signals to said operand memory means for addressing said storage locations in said operand memory means for said providing by said operand memory means; and digital to analog converter means for receiving said successive processed digitally-represented signal sets and for generating said processed analog signal of which said processed signal sets are representative.
Claim 9
Dependent Claim
29 words
A signal processing system according to claim 5 for processing an analog signal representative of a sound signal wherein said processed analog signal is representative of a sound signal.
Claim 10
Independent Claim
258 words
A system for processing signals, comprising: computation means for receiving said signals and for producing processed signals by carrying out operations in accordance with control information for controlling operations of said computation means and operand information to be operated on by said computation means, said computation means including, delay memory means having a plurality of addressable information storage locations for storing signals during said processing and for providing said stored signals after variable time delays, and delay memory addressing means for providing signals to said delay memory means for addressing said storage locations in said delay memory means for said storing and providing by said delay memory means; and controller means for providing signals representative of said control and operand information to said computation means, said controller means including, control memory means coupled to said computation means and having a plurality of addressable information storage locations for storing control information, control memory addressing means for, concurrently with said providing by said delay memory addressing means, providing to said control memory means signals for addressing said storage locations in said control memory means for said providing by said control memory means, operand memory means coupled to said computation means and having a plurality of addressable information storage locations for storing operand information, and operand memory addressing means for, concurrently with said providing by said delay memory addressing means and said control memory addressing means, providing signals to said operand memory means for addressing said storage locations in said operand memory means for said providing by said operand memory means.
Claim 11
Independent Claim
258 words
A system for processing signals, comprising: computation means for receiving said signals and for producing processed signals by carrying out operations in accordance with control information for controlling operations of said computation means and operand information to be operated on by said computation means, said computation means including, delay memory means having a plurality of addressable information storage locations for storing signals during said processing and for providing said stored signals after variable time delays, and delay memory addressing means for providing signals to said delay memory means for addressing said storage locations in said delay memory means for said storing and providing by said delay memory means; and controller means for providing signals representative of said control and operand information to said computation means, said controller means including, control memory means coupled to said computation means and having a plurality of addressable information storage locations for storing control information, control memory addressing means for, concurrently with said providing by said delay memory addressing means, providing to said control memory means signals for addressing said storage locations in said control memory means for said providing by said control memory means, operand memory means coupled to said computation means and having a plurality of addressable information storage locations for storing operand information, and operand memory addressing means for, concurrently with said providing by said delay memory addressing means and said control memory addressing means, providing signals to said operand memory means for addressing said storage locations in said operand memory means for said providing by said operand memory means.
Claim 12
Independent Claim
191 words
A system for processing signals, comprising: computation means for receiving said signals and for producing processed signals by carrying out operations in accordance with control information for controlling operations of said computation means and operand information to be operated on by said computation means; and controller means for storing said control information and said operand information and for providing signals representative of said control information and said operand information, said controller means including, control memory means coupled to said computation means and having a plurality of addressable information storage locations for storing said control information, control memory addressing means for providing to said control memory means signals for consecutively addressing said storage locations in said control memory means in a sequence determined independently of information stored in said storage locations, for said providing by said control memory means, operand memory means coupled to said computation means and having a plurality of addressable information storage locations for storing said operand information, and operand memory addressing means for providing signals to said operand memory means for addressing said storage locations in said operand memory means for said providing by said operand memory means.
Claim 13
Independent Claim
191 words
A system for processing signals, comprising: computation means for receiving said signals and for producing processed signals by carrying out operations in accordance with control information for controlling operations of said computation means and operand information to be operated on by said computation means; and controller means for storing said control information and said operand information and for providing signals representative of said control information and said operand information, said controller means including, control memory means coupled to said computation means and having a plurality of addressable information storage locations for storing said control information, control memory addressing means for providing to said control memory means signals for consecutively addressing said storage locations in said control memory means in a sequence determined independently of information stored in said storage locations, for said providing by said control memory means, operand memory means coupled to said computation means and having a plurality of addressable information storage locations for storing said operand information, and operand memory addressing means for providing signals to said operand memory means for addressing said storage locations in said operand memory means for said providing by said operand memory means.
Claim 14
Dependent Claim
221 words
A digital to analog converter system for generating an analog signal of which successive digitally-represented, multidigit signal sets are indicative, comprising: means for receiving said successive digitally-represented signal sets and for generating modified digitally-represented, multidigit signal sets having values which are indicative in each case of the value of an unmodified digitally-represented signal set multiplied by a factor representative of a variable range classification for said unmodified signal sets, said receiving and generating means including means for generating signals representative of said range classification; converter means for producing in response to said modified digitally-represented signal sets, an analog signal of which said modified signal sets are indicative; means for generating in response to said analog signal and said signals representative of said range classification, a modified analog signal having values along portions thereof, indicative for each portion, of the values along a corresponding portion of said unmodified analog signal divided by a factor indicative in each case of the multiplication factor for an unmodified digitally-represented signal set corresponding to the portion of said unmodified analog signal; and timing means for preventing changes in said variable range classification which would be represented by successively greater multiplication factors within a predetermined time interval and permitting changes in said variable range classification which are represented by successively smaller multiplication factors within said predetermined interval.
Claim 15
Dependent Claim
221 words
A digital to analog converter system for generating an analog signal of which successive digitally-represented, multidigit signal sets are indicative, comprising: means for receiving said successive digitally-represented signal sets and for generating modified digitally-represented, multidigit signal sets having values which are indicative in each case of the value of an unmodified digitally-represented signal set multiplied by a factor representative of a variable range classification for said unmodified signal sets, said receiving and generating means including means for generating signals representative of said range classification; converter means for producing in response to said modified digitally-represented signal sets, an analog signal of which said modified signal sets are indicative; means for generating in response to said analog signal and said signals representative of said range classification, a modified analog signal having values along portions thereof, indicative for each portion, of the values along a corresponding portion of said unmodified analog signal divided by a factor indicative in each case of the multiplication factor for an unmodified digitally-represented signal set corresponding to the portion of said unmodified analog signal; and timing means for preventing changes in said variable range classification which would be represented by successively greater multiplication factors within a predetermined time interval and permitting changes in said variable range classification which are represented by successively smaller multiplication factors within said predetermined interval.
Claim 16
Dependent Claim
268 words
A digital to analog converter system for generating an analog signal of which successive digitally-represented, multidigit signal sets are indicative, comprising: means for receiving said successive digitally-represented signal sets and for generating modified digitally-represented, multidigit signal sets having values which are indicative in each case of the value of an unmodified digitally-represented signal set multiplied by a factor representative of a variable range classification for said unmodified signal sets, said receiving and generating means including means for shifting the digits repesented in a plurality of adjoining digit positions in an unmodified signal set to positions in the corresponding modified signal set which represent a shift of said digits a number of positions corresponding to the multiplication factor for said unmodified signal set, and including means for generating signals representative of said range classification; converter means for producing in response to said modified digitally-represented signal sets, an analog signal of which said modified signal sets are indicative; means for generating in response to said analog signal and said signals representative of said range classification, a modified analog signal having values along portions thereof, indicative for each portion, of the values along a corresponding portion of said unmodified analog signal divided by factor indicative in each case of the multiplication factor for an unmodified digitally-represented signal set corresponding to the portion of said unmodified analog signal; and timing means for preventing changes in said variable range classification which would be represented by successively greater multiplication factors within a predetermined interval and permitting changes in said variable range classification which are represented by successively smaller multiplication factors within said predetermined interval.
Claim 17
Dependent Claim
268 words
A digital to analog converter system for generating an analog signal of which successive digitally-represented, multidigit signal sets are indicative, comprising: means for receiving said successive digitally-represented signal sets and for generating modified digitally-represented, multidigit signal sets having values which are indicative in each case of the value of an unmodified digitally-represented signal set multiplied by a factor representative of a variable range classification for said unmodified signal sets, said receiving and generating means including means for shifting the digits repesented in a plurality of adjoining digit positions in an unmodified signal set to positions in the corresponding modified signal set which represent a shift of said digits a number of positions corresponding to the multiplication factor for said unmodified signal set, and including means for generating signals representative of said range classification; converter means for producing in response to said modified digitally-represented signal sets, an analog signal of which said modified signal sets are indicative; means for generating in response to said analog signal and said signals representative of said range classification, a modified analog signal having values along portions thereof, indicative for each portion, of the values along a corresponding portion of said unmodified analog signal divided by factor indicative in each case of the multiplication factor for an unmodified digitally-represented signal set corresponding to the portion of said unmodified analog signal; and timing means for preventing changes in said variable range classification which would be represented by successively greater multiplication factors within a predetermined interval and permitting changes in said variable range classification which are represented by successively smaller multiplication factors within said predetermined interval.
References Cited (Backward Citations)
US4048635A
Cited
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Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-08-26 | 1984-02-25 | 1984-08-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-08-26 | 1988-02-25 | 1988-08-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-08-26 | 1992-02-25 | 1992-08-26 | $7700.00 | Window Closed / Lapsed |