Digital duplex transmission system

Claim 1

A digital duplex transmission system comprising: two terminals interconnected by a 2-wire transmission line; first means disposed in one of said terminals coupled to said line for transmitting isochronous digital signals as pulse encoded signals of one type having a duty factor not exceeding 50% over said line; second means disposed in the other of said terminals coupled to said line for transmitting isochronous digital signals as pulse encoded signals of a different type having a duty factor not exceeding 50% over said line; said one type of encoded signals and said different type of encoded signals having the same digit repetition rate; third means disposed in said one of said terminals coupled to said line to receive said different type of encoded signals from said line; and fourth means disposed in said other of said terminals coupled to said line to receive said one type of encoded signals from said line; the timing of one of said one type of encoded signals and said different type of encoded signal transmitted from one of said one of said terminals and said other of said terminals having a predetermined fixed relationship with the other of said one type of encoded signals and said different type of encoded signals received at said one of said one of said terminals and said other of said terminals such that the periods of zero signal in said one of said one type of encoded signals and said different type of encoded signals coincide with the significant portions of said other of said one type of encoded signals and said different type of encoded signals.

Claim 4

A system according to claims 1 or 2, wherein said one type of encoded signals are dipulse encoded signals having a given format and said different type of encoded signals are dipulse encoded signals having a format different than said given format.

Claim 5

A system according to claims 1 or 2, wherein said one type of encoded signals are dipulse encoded signals, and said different type of encoded signals are simple binary signals in an alternate mark inversion format.

Claim 6

A system according to claims 1 or 2, further including a first terminating set disposed in said one of said terminals to connect said first and third means to said line; the a second terminating set disposed in said other of said terminals to connect said third and fourth means to said line.

Claim 8

A system according to claims 1 or 2, wherein at least one of said one type of encoded signals and said different type of encoded signals are dipulse encoded signals, and at least one of said first and second means includes fifth means for reducing the amplitude of a first voltage level in said dipulse encoded signals in a digit period when said first voltage level succeeds a second voltage of the same polarity in the immediately preceding digit period.

Claim 9

A system according to claims 1 or 2, wherein each of said one type of encoded signals and said different type of encoded signals include predetermined psuedo-idle digit periods, said psuedo-idle digit periods contained in said one type of encoded signals being non-coincident with said psuedo-idle digit periods contained in said different type of encoded signals.

Claim 10

A system according to claims 1 or 2, wherein said one terminal decodes said different type of encoded signals received from said other terminal under control of a clock signal generated in said one terminal, said clock signal having the same frequency as a master clock signal but having a predetermined phase relationship thereto.