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US4225946A Expired / Lapsed US ⏱️ 0.0 years remaining

Multilevel erase pulse for amorphous memory devices

Assignee: Harris Corp
•
Filing: 1979-01-24
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Granted: 1980-09-30
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Expires: 1999-01-24
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Abstract

Abstract The Write/Erase lifetimes of amorphous memory devices are extended by applying a multilevel erase pulse wherein the first stage has a current amplitude sufficient to heat the crystal filament to the phase change temperature but not to provide the energy for the phase change and erasure of the crystal structure and the second stage has a current amplitude sufficient to heat the filament to remove the crystal structure. Preferably the first stage current is equal to the write current and the second stage is equal to the write current times the ratio of the electrical conductivity of the amorphous conducting state to the apparent conductivity of the crystalline state.

Inventors

  • 👤 Ronald G. Neale
  • 👤 Grady M. Wood

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 07:56
CPC Classifications
G; G11; G11C; G11C13/00; G11C13/0002; G11C13/0004; G11C13/0021; G11C13/0069; G11C13/0097; H; H10; H10N; H10N70/00; H10N70/20; H10N70/231; H10N70/801; H10N70/881; H10N70/882; H10N70/8828; G11C2013/0092

Claims Analysis

Total Claims: 25
Claim 1
Independent Claim 193 words
A method of resetting a filament-type memory device including spaced electrodes between which extend a body of generally amorphous substantially nonconductive memory semiconductor material which, when a set voltage pulse in excess of a given threshold voltage value and duration is applied to said electrodes, has formed therein a crystalline low resistance filamentous path resettable into a generally amorphous condition by application of one or more voltage pulses producing reset current pulses through said filamentous path which heat the same to a temperature which changes the phase of the crystalline filament and are of a duration which is so short that upon termination of each reset current pulse the filamentous path will be quickly quenched to leave at least portions of the filamentous path in a substantially amorphous condition, said method comprising: applying to said electrodes a plurality of reset voltage pulses which produce a plurality of reset current pulses each having a first stage amplitude and duration sufficient to heat the filament to the phase change temperature of the material and a second stage amplitude and duration larger than said first stages and sufficient to change the phase of the crystal structure.
Claim 2
Independent Claim 193 words
A method of resetting a filament-type memory device including spaced electrodes between which extend a body of generally amorphous substantially nonconductive memory semiconductor material which, when a set voltage pulse in excess of a given threshold voltage value and duration is applied to said electrodes, has formed therein a crystalline low resistance filamentous path resettable into a generally amorphous condition by application of one or more voltage pulses producing reset current pulses through said filamentous path which heat the same to a temperature which changes the phase of the crystalline filament and are of a duration which is so short that upon termination of each reset current pulse the filamentous path will be quickly quenched to leave at least portions of the filamentous path in a substantially amorphous condition, said method comprising: applying to said electrodes a plurality of reset voltage pulses which produce a plurality of reset current pulses each having a first stage amplitude and duration sufficient to heat the filament to the phase change temperature of the material and a second stage amplitude and duration larger than said first stages and sufficient to change the phase of the crystal structure.
Claim 3
Dependent Claim 27 words
The method of claim 1 wherein said first stage amplitude is at least the amplitude of a set current produced by said set or write voltage pulse.
Claim 4
Dependent Claim 22 words
The method of claim 2 wherein said first stage is applied for a duration in the range of 40 to 300 nanoseconds.
Claim 5
Dependent Claim 20 words
The method of claim 2 wherein said first stage amplitude is no greater than one half said second stage amplitude.
Claim 6
Dependent Claim 22 words
The method of claim 4 wherein said second stage is applied for a duration in the range of 500 to 1,000 nanoseconds.
Claim 7
Dependent Claim 40 words
The method of claim 1 wherein the ratio of the first stage amplitude to the second stage amplitude is equal to the ratio of the conductivity of the crystalline state to the electrical conductivity of the amorphous conducting filament state.
Claim 8
Dependent Claim 22 words
The method of claim 1 wherein said first and second stages are square waves, the second stage instantaneously following the first stage.
Claim 9
Dependent Claim 23 words
The method of claim 7 wherein said reset current pulse includes a third stage having an amplitude greater than said second stage amplitude.
Claim 10
Dependent Claim 23 words
The method of claim 1 wherein said first stage has an amplitude and duration insufficient to change the phase of the crystal structure.
Claim 11
Independent Claim 232 words
A method of resetting a filament-type memory device including spaced electrodes between which extend a body of generally amorphous substantially nonconductive memory semiconductor material which, when a set voltage pulse in excess of a given threshold voltage value and duration is applied to said electrodes, has formed therein a crystalline low resistance filamentous path resettable into a generally amorphous condition by application of one or more reset voltage pulses producing reset current pulses through said filamentous path which heat the same to a temperature which changes the phase of the crystalline filament and are of a duration which is so short that upon termination of each reset current pulse the filamentous path will be quickly quenched to leave at least portions of the filamentous path in a substantially amorphous condition, said method comprising: applying to said electrodes a plurality of reset voltage pulses which produce a plurality of reset current pulses, each current pulse having a first stage and a second stage, said first stage having sufficient amplitude and duration to heat the filament to the phase change temperature of the material during an initial plurality of reset pulses while minimizing filament overdrive during a subsequent plurality of reset pulses when the filament switches states, and said second stage having sufficient amplitude and duration to produce a substantial complete phase change of said material from crystalline to amorphous during said reset pulses.
Claim 12
Independent Claim 232 words
A method of resetting a filament-type memory device including spaced electrodes between which extend a body of generally amorphous substantially nonconductive memory semiconductor material which, when a set voltage pulse in excess of a given threshold voltage value and duration is applied to said electrodes, has formed therein a crystalline low resistance filamentous path resettable into a generally amorphous condition by application of one or more reset voltage pulses producing reset current pulses through said filamentous path which heat the same to a temperature which changes the phase of the crystalline filament and are of a duration which is so short that upon termination of each reset current pulse the filamentous path will be quickly quenched to leave at least portions of the filamentous path in a substantially amorphous condition, said method comprising: applying to said electrodes a plurality of reset voltage pulses which produce a plurality of reset current pulses, each current pulse having a first stage and a second stage, said first stage having sufficient amplitude and duration to heat the filament to the phase change temperature of the material during an initial plurality of reset pulses while minimizing filament overdrive during a subsequent plurality of reset pulses when the filament switches states, and said second stage having sufficient amplitude and duration to produce a substantial complete phase change of said material from crystalline to amorphous during said reset pulses.
Claim 13
Dependent Claim 25 words
The method of claim 10 wherein said first stage amplitude is at least the amplitude of a set current produced by said set voltage pulse.
Claim 14
Dependent Claim 40 words
The method of claim 10 wherein the ratio of the first stage amplitude to the second stage amplitude is equal to the ratio of the conductivity of the crystalline state to the electrical conductivity of the amorphous conducting filament state.
Claim 15
Dependent Claim 23 words
The method of claim 10 wherein said first stage has an amplitude and duration insufficient to change the phase of the crystal structure.
Claim 16
Dependent Claim 226 words
In a circuit having a filament-type memory device including spaced electrodes between which extend a body of generally amorphous substantially nonconductive memory semiconductor material which, when a set voltage pulse in excess of a given threshold voltage value and duration is applied to said electrodes has formed therein, a crystalline low resistance filamentous path resettable into a generally amorphous condition by application of one or more reset voltage pulses producing reset current pulses through said filamentous path which heat the same to a temperature which changes the phase of the crystalline filament and are of a duration which is so short that upon termination of each reset current pulse the filamentous path will be quickly quenched to leave at least portions of the filamentous path in a substantially amorphous condition; and means selectively connectable to said electrodes for applying reset voltage pulse or pulses which produces a reset current pulse or pulses which substantially completely convert the crystalline filamentous path to a substantially amorphous filamentous path, the improvement comprising said means applying reset voltage pulse or pulses which produces a reset current pulse having a first stage amplitude sufficient to heat the filament to the phase change temperature of the material and a second stage amplitude larger than said first stage amplitude and sufficient to heat the filament to change the phase of the crystal structure.
Claim 17
Dependent Claim 226 words
In a circuit having a filament-type memory device including spaced electrodes between which extend a body of generally amorphous substantially nonconductive memory semiconductor material which, when a set voltage pulse in excess of a given threshold voltage value and duration is applied to said electrodes has formed therein, a crystalline low resistance filamentous path resettable into a generally amorphous condition by application of one or more reset voltage pulses producing reset current pulses through said filamentous path which heat the same to a temperature which changes the phase of the crystalline filament and are of a duration which is so short that upon termination of each reset current pulse the filamentous path will be quickly quenched to leave at least portions of the filamentous path in a substantially amorphous condition; and means selectively connectable to said electrodes for applying reset voltage pulse or pulses which produces a reset current pulse or pulses which substantially completely convert the crystalline filamentous path to a substantially amorphous filamentous path, the improvement comprising said means applying reset voltage pulse or pulses which produces a reset current pulse having a first stage amplitude sufficient to heat the filament to the phase change temperature of the material and a second stage amplitude larger than said first stage amplitude and sufficient to heat the filament to change the phase of the crystal structure.
Claim 18
Dependent Claim 26 words
The circuitry of claim 14 wherein a said first stage amplitude is at least the amplitude of a set current produced by said set voltage pulse.
Claim 19
Dependent Claim 22 words
The circuit of claim 15 wherein said first stage is applied for a duration in the range of 40 to 300 nanoseconds.
Claim 20
Dependent Claim 20 words
The circuit of claim 15 wherein said first stage amplitude is no greater than one half said second stage amplitude.
Claim 21
Dependent Claim 22 words
The circuit of claim 17 wherein said second stage is applied for a duration in the range of 500 to 1,000 nanoseconds.
Claim 22
Dependent Claim 38 words
The circuit of claim 14 wherein the ratio of the first stage amplitude to the second stage is equal to the ratio of the conductivity of the crystalline state to the conductivity of the amorphous conducting filament state.
Claim 23
Dependent Claim 22 words
The circuit of claim 14 wherein said first and second stages are square waves, the second stage instantaneously following the first stage.
Claim 24
Dependent Claim 23 words
The circuit of claim 20 wherein said reset current pulse includes a third stage having an amplitude greater than said second stage amplitude.
Claim 25
Dependent Claim 23 words
The circuit of claim 14 wherein said first stage has an amplitude and duration insufficient to change the phase of the crystal structure.

References Cited (Backward Citations)

GB1372414A Cited
US3827033A Cited
US3886577A Cited
US3846767A Cited
US3875566A Cited
US3922648A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-09-30 1984-03-31 1984-09-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-09-30 1988-03-31 1988-09-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-09-30 1992-03-31 1992-09-30 $7700.00 Window Closed / Lapsed

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