Transistorized D-C/A-C converter

Claim 1

A d-c/a-c converter comprising: a transformer having a secondary winding connected across a load and a primary winding divided into two symmetrical halves; a pair of transistors each having a base, a collector and an emitter, the collector/emitter path of each transistor being connected between a respective half of said primary winding and a common junction point; a supply of direct current connected between said junction point and a center tap of said primary winding, thereby forming a pair of substantially identical circuit branches for the energization of said halves upon conduction of the respective transistors; sensing means connected across symmetrical portions of said circuit branches for producing an unbalance signal in response to an unsymmetrical current component traversing said primary winding; an adder and a substractor connected in parallel to said sensing means and to a source of reference voltage for producing two control signals varying in opposite senses upon deviations of said unbalance signal from zero; a first signal generator producing a sawtooth voltage; a second signal generator producing a square wave with a period twice that of said sawtooth voltage; and processing means delivering a pair of pulse trains, of a pulse width varying with the sign and the magnitude of said unbalance signal, to the bases of said transistors for alternately saturating said transistors with a relative timing tending to minimize said unsymmetrical current component, said processing means including a pair of comparators in cascade with a pair of logic gates, said comparators having first inputs connected to receive said control signals from said adder and said subtractor, respectively, and further having second inputs connected to receive said sawtooth wave from said first signal generator, said logic gates having input connections with inversion means for respectively receiving said square wave and a complement thereof from said second signal generator.