← Back to Patent Explorer
US4242737A Expired / Lapsed US ⏱️ 0.0 years remaining

Non-volatile semiconductor memory elements

Assignee: Texas Instruments Inc
•
Filing: 1978-11-27
•
Granted: 1980-12-30
•
Expires: 1998-11-27
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract The invention is embodied in a non-volatile metal-insulator-semiconductor having a novel combination of insulating layers including a silicon nitride layer covered by a silicon dioxide layer covered by a high dielectric constant insulator. In one embodiment of the invention the nitride layer is directly upon the semiconductor. In another embodiment the insulator combination also includes a second layer of silicon dioxide located between the nitride layer and the semiconductor. Writing is accomplished by injection of charge into the nitride layer and shifting the threshold voltage of the structure. Erasure is accomplished by forcing the injected charge back into the semiconductor to recombine with majority carriers. The charge can be electrons or holes depending on the semiconductor type. The memory element of the invention has lower write/erase voltages, shorter write/erase times and higher writing efficiency.

Inventors

  • 👤 Robert T. Bate

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 14:00
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/69; G; G11; G11C; G11C16/00; G11C16/02; G11C16/04; G11C16/0466; H10B; H10B43/00; H10B43/30; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6302; H10P14/6304; H10P14/6314; H10P14/6322; Y; Y10; Y10S; Y10S148/00; Y10S148/156

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 62 words
A memory element comprising: a semiconductor body; a first layer of silicon dioxide upon said body; a layer of silicon nitride upon said silicon dioxide layer; a second layer of silicon dioxide upon said nitride layer; a layer of titanium dioxide of a form known as rutile upon said second silicon dioxide layer; and a conducting layer upon said titanium dioxide layer.
Claim 2
Dependent Claim 62 words
A memory element comprising: a semiconductor body; a first layer of silicon dioxide upon said body; a layer of silicon nitride upon said silicon dioxide layer; a second layer of silicon dioxide upon said nitride layer; a layer of titanium dioxide of a form known as rutile upon said second silicon dioxide layer; and a conducting layer upon said titanium dioxide layer.
Claim 3
Dependent Claim 18 words
An element according to claim 1 wherein said first silicon dioxide layer is less than 150 Angstroms thick.
Claim 4
Dependent Claim 16 words
An element according to claim 1 wherein said nitride layer is less than 750 Angstroms thick.
Claim 5
Dependent Claim 18 words
An element according to claim 1 wherein said second silicon dioxide layer is less than 125 Angstroms thick.
Claim 6
Dependent Claim 37 words
An element according to claim 1 wherein said element includes a pair of spaced doped regions in said body of conductivity type opposite that of said body and wherein said layers are between said pair of regions.
Claim 7
Dependent Claim 94 words
A memory cell comprising: a memory element; a means for writing information into said element; a means for reading information from said element; a means for erasing information in said element wherein said element includes a semiconductor body, a first layer of silicon dioxide upon said body, a layer of silicon nitride upon said first silicon dioxide layer, a second layer of silicon dioxide upon said nitride layer, a layer of titanium dioxide of a form known as rutile upon said second silicon dioxide layer, and a conducting layer upon said titanium dioxide layer.
Claim 8
Dependent Claim 94 words
A memory cell comprising: a memory element; a means for writing information into said element; a means for reading information from said element; a means for erasing information in said element wherein said element includes a semiconductor body, a first layer of silicon dioxide upon said body, a layer of silicon nitride upon said first silicon dioxide layer, a second layer of silicon dioxide upon said nitride layer, a layer of titanium dioxide of a form known as rutile upon said second silicon dioxide layer, and a conducting layer upon said titanium dioxide layer.
Claim 9
Dependent Claim 84 words
A memory element comprising: a semiconductor body; a first layer of silicon dioxide upon said body, said first layer having a thickness less than 150 A; a layer of silicon nitride upon said silicon dioxide layer, said silicon nitride layer having a thickness less than 750 A; a second layer of silicon dioxide upon said nitride layer, said second layer having a thickness less than 125 A; an insulating layer upon said second silicon dioxide layer; and a conducting layer upon said insulating layer.
Claim 10
Dependent Claim 84 words
A memory element comprising: a semiconductor body; a first layer of silicon dioxide upon said body, said first layer having a thickness less than 150 A; a layer of silicon nitride upon said silicon dioxide layer, said silicon nitride layer having a thickness less than 750 A; a second layer of silicon dioxide upon said nitride layer, said second layer having a thickness less than 125 A; an insulating layer upon said second silicon dioxide layer; and a conducting layer upon said insulating layer.
Claim 11
Dependent Claim 38 words
An element according to claim 7 wherein said element includes a pair of spaced apart doped regions in said body of conductivity type opposite that of said body and wherein said layers are between said pair of regions.
Claim 12
Dependent Claim 19 words
An element according to claim 7 wherein said insulating layer is titanium dioxide of a form known as rutile.
Claim 13
Dependent Claim 16 words
An element according to claim 7 wherein said insulating layer is less than 5000 Angstroms thick.
Claim 14
Dependent Claim 17 words
An element according to claim 7 wherein said insulating layer has a dielectric constant greater than 15.

References Cited (Backward Citations)

US3967310A Cited
US4024562A Cited
US4112507A Cited
US4151537A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-12-30 1984-06-30 1984-12-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-12-30 1988-06-30 1988-12-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-12-30 1992-06-30 1992-12-30 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag