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US4243956A Expired / Lapsed US ⏱️ 0.0 years remaining

Automatic equalizer for a synchronous digital transmission signal

Assignee: Alcatel CIT SA
•
Filing: 1979-03-09
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Granted: 1981-01-06
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Expires: 1999-03-09
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Abstract

Abstract The present invention comes within the field of synchronous digital transmission. It provides an automatic variable equalization network (1) equipped with phase-locking means, in which a sign coincidence autocorrelator (30) correlates the polarities of two versions of the equalized signal delayed in relation to each other by τ, an integer multiple of the unit time interval of the transmission. It is used advantageously for equalizing synchronous digital transmission channels in switched telephone or telegraph networks.

Inventors

  • 👤 Michel Lemoussu
  • 👤 Claude Cardot

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 18:22
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/02; H04L25/03; H04L25/03006; H04L25/03012; H04L25/03019; H04B; H04B3/00; H04B3/02; H04B3/04; H04B3/06

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 99 words
An automatic equalizer for compensating for the linear distortion experienced by a digital signal when transmitted over a transmission channel 3, said digital signal comprising a train of digital pulses of a constant unit time interval, the equalizer comprising: (a) a variable equalization network 10 having a feedback control loop comprising: (1) a sign-coincidence auto-correlator 30 for correlating the polarities of a first and a second version of the equalized signal; and (2) means for delaying 13 the second version of the equalized signal with respect to the first version by an integer multiple of said unit time interval.
Claim 2
Dependent Claim 99 words
An automatic equalizer for compensating for the linear distortion experienced by a digital signal when transmitted over a transmission channel 3, said digital signal comprising a train of digital pulses of a constant unit time interval, the equalizer comprising: (a) a variable equalization network 10 having a feedback control loop comprising: (1) a sign-coincidence auto-correlator 30 for correlating the polarities of a first and a second version of the equalized signal; and (2) means for delaying 13 the second version of the equalized signal with respect to the first version by an integer multiple of said unit time interval.
Claim 3
Dependent Claim 57 words
The equalizer according to claim 1, further comprising: a pre-distortion filter 20 connected between the signal output of said variable equalization network and the input of said sign-coincidence, auto-correlator, said pre-distortion filter at least simulating the distortion caused by a portion of said transmission channel, said distortion being at least partially correctable by said variable equalization network.
Claim 4
Dependent Claim 120 words
An automatic equalizer according to claim 2, wherein said signal coincidence autocorrelator includes: an absolute limiter 12 connected to its input, the output of said limiter delivering a logic signal whose level is +1 if its input signal is positive and 0 in the contrary case; an "exclusive OR" logic gate 14 with two inputs each connnected to the output of the absolute limiter, one directly, the other via said delay means; a logic inverter circuit 17; first and second integrators 15, 16 connected to the output of said "exclusive OR" logic gate, one directly, the othr via said logic inverter circuit; and a differential amplifier 18 whose inputs are connected to the outputs of said first and second integrators.
Claim 5
Dependent Claim 78 words
An automatic equalizer according to claim 2, wherein said sign-coincidence autocorrelator includes: an absolute limiter 21 connected to its input, the output of said limiter delivering a binary signal whose level is +1 if its input signal is positive and -1 in the contrary case; a multiplier 22 with two inputs each connected to the output of the absolute limiter, one directly, the other via said delaying means; an integrator 25 connected to the output of the multiplier.
Claim 6
Dependent Claim 31 words
An automatic equalizer according to claim 2, wherein said predistortion filter 20 comprises a low-pass filter whose cut-off frequency is 1/4T, where T is the duration of said unit time interval.

References Cited (Backward Citations)

US3368168A Cited
US3736414A Cited
US3736530A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-01-06 1984-07-07 1985-01-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-01-06 1988-07-07 1989-01-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-01-06 1992-07-07 1993-01-06 $7700.00 Window Closed / Lapsed

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