Binary coded decimal correction apparatus for use in an arithmetic unit of a data processing unit

Claim 1

Apparatus for performing binary coded decimal arithmetic by use of an arithmetic logic unit designed for performing binary arithmetic, said apparatus comprising: A. a binary arithmetic logic unit for performing binary arithmetic on a first operand and a second operand and thereby producing a result, wherein said first and second operands are in binary coded decimal form; B. first means for determining whether the arithmetic operation to be performed by said unit is an add operation or a subtract operation; C. second means, coupled with said logic unit, for determining whether the result of said arithmetic operation on said first operand and said second operand has produced a carry output; and D. correction logic, responsive to the result produced by said unit and resonsive to said first means and said second means for determining, for providing a corrected result of the result produced by said unit, which corrected result is a value in binary coded decimal form, said correction logic including a plurality of storage locations, each of said locations including stored therein a said corrected result corresponding to the result produced by said unit and the operation and possible carry output indicated by said first and second means for determining.