US4295265A
Expired / Lapsed
US
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Method for producing a nonvolatile semiconductor memory
Assignee: Hitachi Ltd
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Filing: 1979-07-18
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Granted: 1981-10-20
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Expires: 1999-07-18
Abstract
Abstract In a nonvolatile semiconductor memory which comprises a source region and a drain region formed on one surface of a semiconductor substrate having one conductivity type, a first insulating film formed on a channel region which is located between the source region and the drain region, a floating gate formed on at least a portion of the first insulating film and which is electrically floated, a control gate formed on the floating gate via a second insulating film, and high impurity concentration regions formed in or near a portion of the channel region and having the same conductivity type as that of the substrate, the floating gate is formed prior to the high impurity concentration regions, and the high impurity concentration regions are formed just outside the channel region by self-alignment with said floating gate using said floating gate as part of a mask.
Inventors
- 👤 Masatada Horiuchi
- 👤 Hisao Katto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 03:27
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/17; H10D62/213; H10D62/221; H10D62/235; H10D62/299; H10D30/00; H10D30/60; H10D30/68; H10D30/681; H10D30/683; H10P; H10P34/00
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
197 words
Method for producing a nonvolatile semiconductor memory comprising; a step of forming a source region and a drain region in a surface portion of a semiconductor substrate having a first conductivity type, said source region and said drain region having a second conductivity type which is opposite to said first conductivity type; a step of forming a thin insulating film on a channel region between said source region and said drain region; a step of depositing a silicon layer on at least a portion of said thin insulating film; a step of doping said silicon layer and at the same time at least one surface portion of said substrate, which is adjacent to said channel region, with impurity having the same conductivity type as that of said substrate for forming a floating gate and at least one high impurity concentration region, doping of said at least one high impurity concentration region being effected by self-alignment with said floating gate using said floating gate as part of a mask; a step of forming a second insulating film on the surface of said floating gate; and a step of forming a control gate electrode on said second insulating film.
Claim 2
Dependent Claim
197 words
Method for producing a nonvolatile semiconductor memory comprising; a step of forming a source region and a drain region in a surface portion of a semiconductor substrate having a first conductivity type, said source region and said drain region having a second conductivity type which is opposite to said first conductivity type; a step of forming a thin insulating film on a channel region between said source region and said drain region; a step of depositing a silicon layer on at least a portion of said thin insulating film; a step of doping said silicon layer and at the same time at least one surface portion of said substrate, which is adjacent to said channel region, with impurity having the same conductivity type as that of said substrate for forming a floating gate and at least one high impurity concentration region, doping of said at least one high impurity concentration region being effected by self-alignment with said floating gate using said floating gate as part of a mask; a step of forming a second insulating film on the surface of said floating gate; and a step of forming a control gate electrode on said second insulating film.
Claim 3
Dependent Claim
40 words
A method for producing a nonvolatile semiconductor memory according to claim 1, wherein the high impurity concentration regions are formed by self-alignment with the floating gate as well as with either one of the source region and the drain region.
Claim 4
Dependent Claim
38 words
A method for producing a nonvolatile semiconductor memory according to claim 1, wherein the high impurity concentration regions are formed by self-alignment with the floating gate as well as with both the source region and the drain region.
Claim 5
Dependent Claim
102 words
A method for producing a nonvolatile semiconductor memory according to claim 1, wherein a thin insulating film is formed on the channel region and on at least a portion of the area along the sides that cross the source region and the drain region, a thick insulating film is formed on other regions, the floating gate is so formed as to cover a portion of the thin insulating film as well as to cover all of the thick insulating film, and the high impurity concentration regions are formed through the thin insulating film which has not been covered by the floating gate.
Claim 6
Dependent Claim
66 words
A method for producing a nonvolatile semiconductor memory according to claim 1, wherein a thick film for insulating the gate and a thin film for insulating the gate are formed closely to each other on the channel region, an ordinary MOS-type semiconductor is formed on the thick film for insulating the gate, and a nonvolatile memory is formed on the thin film for insulating the gate.
Claim 7
Dependent Claim
36 words
A method for producing a nonvolatile semiconductor memory according to claim 1, wherein said at least one high impurity concentration region lies over the source and drain regions, and extends between said source and drain regions.
Claim 8
Dependent Claim
31 words
A method for producing a nonvolatile semiconductor memory according to claim 6, wherein said at least one high impurity concentration region extends the entire length between said source and drain regions.
Claim 9
Dependent Claim
30 words
A method for producing a nonvolatile semiconductor memory according to claim 1, wherein the floating gate is formed to ride on at least one of said source and drain regions.
Claim 10
Dependent Claim
28 words
A method for producing a nonvolatile semiconductor memory according to claim 8, wherein the floating gate is formed to ride on both of said source and drain regions.
Claim 11
Dependent Claim
28 words
A method for producing a nonvolatile semiconductor memory according to claim 8, wherein the floating gate is formed to ride on one of said source and drain regions.
Claim 12
Dependent Claim
49 words
A method for producing a nonvolatile semiconductor memory according to claim 10, wherein a gate insulating film is formed adjacent the other of the source or drain regions on which the floating gate does not ride, and said floating gate is formed to ride on said gate insulating film.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-10-19 | 1985-04-20 | 1985-10-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-10-19 | 1989-04-20 | 1989-10-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-10-19 | 1993-04-20 | 1993-10-20 | $7700.00 | Window Closed / Lapsed |