Format switch

Claim 2

In combination: an A input operand bus adapted to carry binary signals of an A operand of n bits, where n is an integer other than zero; a B input operand bus adapted to carry the binary signals of a B operand of n bits; an output operand bus adapted to carry binary signals on an output operand of n bits, said A, B and output operands each having a format; circuit means having p conditions, where p is an integer other than zero, said circuit means connected to the input operand buses and the output operand bus, said circuit means applying to the output operand bus an output operand, the format of which has a predetermined relationship to the format of the input operands as a function of the condition of the circuit means at any given time; and control means for applying control signals to the circuit means to determine the condition of the circuit means at any given time.

Claim 3

The combination of claim 1 in which n=36 and p=8.

Claim 4

In combination: a first input operand bus adapted to carry binary signals of a first operand of n bits, where n is an integer other than zero; a second input operand bus adapted to carry the binary signals of a second operand of n bits; an output operand bus adapted to carry binary signals on an output operand of n bits, said first, second and output operands each having a format; a one of p condition switch where p is an integer, said switch having p×n input terminals and n output terminals, the input terminals of the switch being connected to the input operand buses and the output terminals being connected to the output operand bus, said switch applying to the output operand bus the binary signals of an output operand, the format of the output operand having a predetermined relationship to the formats of the input operands as a function of the condition of the switch at any given time; and control means for applying control signals to the circuit means to determine the condition of the circuit means at any given time.

Claim 5

In combination: a first input operand bus adapted to carry binary signals of a first operand of n bits, where n is an integer other than zero; a second input operand bus adapted to carry the binary signals of a second operand of n bits; an output operand bus adapted to carry binary signals on an output operand of n bits, said first, second and output operands each having a format; a one of p condition switch where p is an integer, said switch having p×n input terminals and n output terminals, the input terminals of the switch being connected to the input operand buses and the output terminals being connected to the output operand bus, said switch applying to the output operand bus the binary signals of an output operand, the format of the output operand having a predetermined relationship to the formats of the input operands as a function of the condition of the switch at any given time; and control means for applying control signals to the circuit means to determine the condition of the circuit means at any given time.

Claim 6

The combination of claim 3 in which n equals 36 and p=8.

Claim 7

Circuit means for reformating operands comprising: an A input operand having n conductors and adapted to carry the binary signals of an A operand of n bits, where n is an integer other than 0; a B input operand bus having n conductors and adapted to carry the binary signals of a B operand of n bits; an output operand having n conductors and adapted to carry the binary signals of an output operand having n bits, said A, B and output operands each having a format; means for producing binary signals; a controller for producing binary control signals gated switch means having input terminals and n output terminals said input terminals being connected to the conductors of the A and B input buses and to the means for producing binary signals; said switch means being connected to the controller; said switch means having p conditions; said switch means, in response to control signals from the controller, being placed in one of its p conditions; said switch means when in one of its conditions gating predetermined ones of the binary signals connected to its input terminals to its output terminals, so that the format of the output operand on the output bus has a predetermined relationship to the format of the A and B operands, said relationship being different for each of the p conditions of the switch.

Claim 8

Circuit means for reformating operands comprising: an A input operand having n conductors and adapted to carry the binary signals of an A operand of n bits, where n is an integer other than 0; a B input operand bus having n conductors and adapted to carry the binary signals of a B operand of n bits; an output operand having n conductors and adapted to carry the binary signals of an output operand having n bits, said A, B and output operands each having a format; means for producing binary signals; a controller for producing binary control signals gated switch means having input terminals and n output terminals said input terminals being connected to the conductors of the A and B input buses and to the means for producing binary signals; said switch means being connected to the controller; said switch means having p conditions; said switch means, in response to control signals from the controller, being placed in one of its p conditions; said switch means when in one of its conditions gating predetermined ones of the binary signals connected to its input terminals to its output terminals, so that the format of the output operand on the output bus has a predetermined relationship to the format of the A and B operands, said relationship being different for each of the p conditions of the switch.

Claim 9

The circuit means of claim 5 in which n=36 and p=8.

Claim 10

The circuit means of claim 5 in which the means for producing binary signals includes a zone flip flop whose state is determined by control signals from the controller.

Claim 11

The circuit means of claim 5 in which the number of input terminals of the gated switch means equals (n×p).

Claim 12

A circuit for reformating operands comprising: an A input operand bus having n conductors, and adapted to carry the binary signals of an A operand of n bits, where n is an integer other than zero; a B input operand bus having n conductors and adapted to carry the binary signals of a B operand of n bits; an output operand bus having n conductors and adapted to carry the binary signals of an operand of n bits, said A, B, and output operands each having a format; a source of binary signals; n switching units, each switching unit having p conditions, where p is an integer other than zero, each switching unit having p input terminals and an output terminal, the output terminal of each switching unit being connected to one of the conductors of the output operand bus, the input terminals of each unit being connected to the conductors of the A input bus, the B input bus, or the source of binary signals, the connections being such that for each condition of a switching unit the binary signal at one of the input terminals of said unit is present at that units output terminal and so that the format of the output operand on the output operand bus has a predetermined relationship to the A and B operands; and control means connected to the switching units for placing each of said switching units in one of its conditions at any given period of time.

Claim 13

A circuit for reformating operands comprising: an A input operand bus having n conductors, and adapted to carry the binary signals of an A operand of n bits, where n is an integer other than zero; a B input operand bus having n conductors and adapted to carry the binary signals of a B operand of n bits; an output operand bus having n conductors and adapted to carry the binary signals of an operand of n bits, said A, B, and output operands each having a format; a source of binary signals; n switching units, each switching unit having p conditions, where p is an integer other than zero, each switching unit having p input terminals and an output terminal, the output terminal of each switching unit being connected to one of the conductors of the output operand bus, the input terminals of each unit being connected to the conductors of the A input bus, the B input bus, or the source of binary signals, the connections being such that for each condition of a switching unit the binary signal at one of the input terminals of said unit is present at that units output terminal and so that the format of the output operand on the output operand bus has a predetermined relationship to the A and B operands; and control means connected to the switching units for placing each of said switching units in one of its conditions at any given period of time.

Claim 14

The circuit of claim 9 in which n=36 and p=8.

Claim 15

The circuit of claim 7 in which the source of binary signals includes a flip flop having two states, said flip flop being connected to the control means, and the state of the flip flop being determined by the control means.

Claim 16

Circuit means for reformating operands comprising: an A input operand bus having n conductors and adapted to carry the binary signals of an A operand of n bits, where n is an integer other than zero; a B input operand bus having n conductors and adapted to carry the binary signals of a B operand of n bits; an output operand having n conductors and adapted to carry the binary signals of an output operand having n bits, said A, B and output operands each having a format; means for producing binary signals; a source of control signals; format switch means connected to the A and B operand input buses, the means for producing binary signals, and the source of control signals; said format switch having p conditions, where p is an integer other than 0; said switch means being placed in each of its p conditions by control signals from the source of control signals; said format switch means when placed in one condition by control signals converting one input operand having a compressed right format to an output operand having a packed format; said format switch means when placed in another condition by control signals converting one input operand in a packed format to an output operand in a compressed right format; said format switch means when placed in yet another condition by control signals converting an input operand having a packed format to an output operand having a compressed left format; said format switch means when placed in still another condition by control signals from the source of control signals converting the format of both input operands each having an unpacked format to an output operand in the compressed right format; said format switch means when placed in an additional condition by control signals from the source of control signals converting both input operands in the unpacked format to an output operand in the compressed left format; said format switch means when placed in still another condition by control signals from the source of control signals converting a part of one input operand in the compressed right format into an output operand having an unpacked format; said format switch means when placed in a further condition by control signals from the control source converting another part of one of the input operands in the compressed right format, into an output operand having an unpacked format; and said format switch means when placed in a still further condition connecting one input operand without change of format.

Claim 17

Circuit means for reformating operands comprising: an A input operand bus having n conductors and adapted to carry the binary signals of an A operand of n bits, where n is an integer other than zero; a B input operand bus having n conductors and adapted to carry the binary signals of a B operand of n bits; an output operand having n conductors and adapted to carry the binary signals of an output operand having n bits, said A, B and output operands each having a format; means for producing binary signals; a source of control signals; format switch means connected to the A and B operand input buses, the means for producing binary signals, and the source of control signals; said format switch having p conditions, where p is an integer other than 0; said switch means being placed in each of its p conditions by control signals from the source of control signals; said format switch means when placed in one condition by control signals converting one input operand having a compressed right format to an output operand having a packed format; said format switch means when placed in another condition by control signals converting one input operand in a packed format to an output operand in a compressed right format; said format switch means when placed in yet another condition by control signals converting an input operand having a packed format to an output operand having a compressed left format; said format switch means when placed in still another condition by control signals from the source of control signals converting the format of both input operands each having an unpacked format to an output operand in the compressed right format; said format switch means when placed in an additional condition by control signals from the source of control signals converting both input operands in the unpacked format to an output operand in the compressed left format; said format switch means when placed in still another condition by control signals from the source of control signals converting a part of one input operand in the compressed right format into an output operand having an unpacked format; said format switch means when placed in a further condition by control signals from the control source converting another part of one of the input operands in the compressed right format, into an output operand having an unpacked format; and said format switch means when placed in a still further condition connecting one input operand without change of format.

Claim 18

The circuit means of claim 12 in which n=36.

Claim 19

The circuit means of claim 13 in which p=8.

Claim 20

The circuit means of claim 12 in which the means for producing binary signals is a zone flip flop connected to the source of control signals, the state of the flip flop being determined by control signals from the source of control signals.